Advertisement
A flip-flop is a sort of a one bit memory, or latch. Once triggered by a positive going pulse at
pin 12, it stays latched. You can only reset it by removing the power or a reset pulse at its
other input, pin 9. When the flip-flop is latched, pin 10 goes high and pin 11 goes low. The
output at pin 10 is passed via R89 and U12 to the lag generator's input, thus causing C37 to
start to charge upwards. R89 is chosen to interact with R73 to give an input signal of 7.5V in
the high state.
In any mode, removing the gate will reset the flip-flop. The inverted gate signal from Q11
goes to a second differentiator, C39, R92 and D11. When a gate signal is removed, the
positive going edge runs through U13 (pins 1,2,3 & 4,5,6) to reset the flip-flop. Thus
removing a gate signal will cause the lag generator's output to fall.
Another way to reset the flip-flop is in the AD mode. This utilises the actual output of the lag
generator to control the discharging process. When the output of the lag generator exceeds a
certain value, approximately +3.8V, the flip-flop is reset and the output voltage will drop.
This job is performed by a comparator based around U10a (pins 1, 2, 3) and Q10. The output
of the lag generator is passed onto the comparator by another analogue switch U12 (pins 1, 2,
13). In AR mode, this is switched off and the input to the comparator is held low by R83. In
AD mode, the switch opens to allow the comparator to sniff the output of the lag generator.
When the voltage exceeds +3.8V or so, the comparator's output goes from 0V to +15V. This
tells the flip-flop that the attack phase is over and the decay phase is about to start. Pin 10
therefore goes low and C37 is discharged via the 'down' pot.
R69 and R70 set the +3.8V threshold level. R77 with R78 provides a thin slice of positive
feedback to force the comparator to switch cleanly... it is another Schmitt trigger again.
The LFO circuit is quite simple. It is on page two of the schematics.
The first TL072 op-amp, U16a (pins 1, 2, 3) forms part of the integrator. Any positive voltage
applied to the right of R120 will cause the voltage to fall at the output of the op-amp. The
speed at which the voltage falls is controlled by C52 and the size of the voltage applied to
R120. If the applied voltage is negative the op-amp's output will rise. It is the integrator's
output that will be used as the source for the triangle wave output.
The second half of the TL072 op-amp is used as a Schmitt trigger. Its output is either high at
+13V, or low at -13V. If the output of the Schmitt is initially low, it requires +6V at the
output of the integrator to make it go high. The integrator will need to produce an output of
-6V to make the Schmitt go low again.
To make any oscillator you normally require an output to be fed back into the input. In a
standard LFO like this one, the integrator is fed by the output of the Schmitt trigger. Thus, a
low at the output of the Schmitt causes the integrator to rise. When the integrator's output
reaches a certain point, the Schmitt switches state and the integrator's output falls. The
Schmitt trigger changes state once again, and the process repeats itself....
The 'LFO-rate' pot allows a only a controlled proportional of the Schmitt's output voltage to
reach the integrator. If the proportion is large, the voltage on R120 is large, and the integrator
13
Advertisement
