Advertisement
possible from the FWR through a diode. The capacitor is then discharged through a resistor,
sometimes variable but often not, causing the stored voltage to droop at a determined rate.
However, they are often plagued by ripple when used to process certain types of input signal.
Ripple is the bumps from the FWR creeping through to affect the required output. This tends
to manifest itself in a 'buzz' to the output CV. If you increase the discharge resistor, you can
reduce the bumps but this tends to not allow the CV to drop quick enough when the input
signal ends.
Another method involves low pass filtering of the FWR output. This leads to less bumps if the
correct filter cut-off frequency is chosen, but does lead to longer attack times. There are more
complex ways too, involving sample and holds and other clever methods.
In the Filtrex the output of the FWR is passed to a special circuit called the 'lag processor'.
This is cleverly combined with the function of the envelope generator and is described in detail
later. At this point I will just say that it functions as a simple low pass filter with controllable
rise and fall times.
But let us stay on page two for now. To create a gate signal we need a very fast response. In
an ideal world this signal must go high the moment the signal arrives and goes low the
moment the signal dies away. In this case I have used the peak and droop method. This does
give us a fast as response as possible, but what about the ripple. Well, ripple is not that
important here. Remember the gate output only goes high or low. What we have to do is
make sure our gate doesn't 'rattle' when it picks up the ripple. In other words, we need our
gate to come cleanly on and off with no spurious states as the signal rises and falls.
U14b (pins 5, 6, 7) is a comparator. This is a device based around an op-amp that determines
whether a signal is higher than a pre-selected threshold voltage. The threshold voltage is
controlled by the user, and is set by the 'Threshold' pot. The threshold voltage can be set
between 12V and 0.7V. C44 is charged via D15 from the FWR output. D15 allows the
capacitor to be charged up, but not discharged, by the FWR's output. R104 allows the
capacitor's stored peak voltage to droop at a controlled rate.
Most gate extractors provide a gate signal when the voltage on the capacitor is above a certain
value. The Filtrex is similar but once the gate does go high, a certain proportion of the
opamp's high level output is fed back, via D16, to keep the input higher. This forces the
comparator to stay high longer than it would normally do. This allows more ripple to be
present before 'rattling' occurs, giving us a cleaner edge to our gates. You don't have any
control over this amount of positive feedback, it is set by the value of R105. A good
comparator designs have a little positive feedback anyway, it is called hysteresis, and in our
case it is provided by R106. But the additional path via D16 offers a type of one way
hysteresis that gives us better high to low gate transitions.
The comparator's output is fed via D17 to a transistor Q13. This transistor is turned on when
the comparator's output goes positive. D17 protects the transistor from damaging negative
output voltages. Q13's collector will be pulled down to ground when the transistor is turned
on. This in turn controls the envelope generator's logic circuitry described later.
Lets have a look at the third page and the envelope processor itself. This is quite a hard bit to
understand.
11
Advertisement
