Aiwa CSD-ED79 Service Manual page 20

Pin No. Pin Name
38 LVSS
39 RVSS
40 RCHO
41 RVDD
42 MUTER
43 XVDD
44 XOUT
45 XIN
46 XVSS
47 SBSY
48 EFLG
49 PW
50 SFSY
51 SBCK
52 FSX
53 WRQ
54 RWC
55 SQOUT
56 COIN
57 CQCK
58 RES
59 T11
60 16M
61 4.2M
62 T5
63 CS
64 T1
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I/O
– Left channel ground.
– Right channel ground.
O Right channel output.
– Right channel power supply.
O Right channel mute output. (Not used)
– Crystal oscillator power supply.
O
Connections for a 16.9344MHz crystal oscillator element.
I
– Crystal oscillator ground.
O Subcode block synchronization signal. (Not used)
O C1, C2 single and double error correction monitor pin. (Not used)
O Subcode P,Q,R,S,T,U and W output. (Not used)
O Subcode frame synchronization signal output. (Not used)
I Subcode readout clock input. (Connected to 0V)
Output for the 7.35kHz synchronization signal divided from the crystal oscillator.
O
(Not used)
O Subcode Q output standby output.
I Read/Write control input.
O Subcode Q output.
I Command input from the control microprocessor.
I Input for command input acquisition clock and SQOUT pin subcode readout clock.
I Chip reset input.
O Test output. Leave open. (Not used)
O 16.9344MHz output. (Not used)
O 4.2336MHz output.
I Test input. (Connected to 0V)
I Chip select input. (Connected to 0V)
I Test input. (Connected to 0V)
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Description