Tektronix MTX100B Technical Reference page 8

Table of Contents
List of Figures
Figure 1-1: Timing diagram of the SPI and universal parallel/serial interfaces .........................
Figure 2-1: Pin connections for a crossover Ethernet cable .................................................
Figure 2-2: Network Connections window ....................................................................
Figure 2-3: Local Area Connection Status dialog box .......................................................
Figure 2-4: Local Area Connection Properties dialog box...................................................
Figure 2-5: Internet Protocol (TCP/IP) Properties dialog box...............................................
Figure 2-6: Equipment connection for verifying the internal clock output level ..........................
Figure 2-7: Equipment connection for verifying the internal clock frequency ............................
Figure 2-8: Equipment connection for verifying the SPI interface .......................................
Figure 2-9: Equipment connections for verifying the external clock/reference and trigger inputs....
Figure 2-10: Equipment connection for verifying the IEEE1394b interface ............................
Figure 2-11: Equipment connection for verifying the output signal-ASI interface .....................
Figure 2-12: Equipment connections for verifying the play operation-ASI interface ..................
Figure 2-13: Equipment connection for verifying the record operation-ASI interface .................
Figure 2-14: Equipment connection for verifying the recorded file-ASI interface......................
Figure 2-15: Equipment connection for verifying the output signals-universal parallel/serial
interface.....................................................................................................
Figure 2-16: Equipment connection for verifying the play operation-universal parallel/serial
interface.....................................................................................................
Figure 2-17: Equipment connection for verifying the recorded file-universal parallel/serial interface
Figure 2-18: Equipment connection for verifying the Event output ......................................
Figure 2-19: Equipment connection for verifying the output signal-IEEE1394/ASI interface ........
Figure 2-20: Equipment connection for verifying the play operation-IEEE1394/ASI interface.......
Figure 2-21: Equipment connection for verifying the record operation-IEEE1394/ASI interface ....
Figure 2-22: Equipment connection for verifying the recorded file-IEEE1394/ASI interface.........
Figure 2-23: Equipment connection for verifying the IEEE1394 output signal .........................
Figure 2-24: Equipment connection for verifying output signal-SMPTE310M interface..............
Figure 2-25: Equipment connection for verifying the ASI play operation ...............................
Figure 2-26: Equipment connection for verifying the ASI record operation ............................
Figure 2-27: Equipment connection for verifying the recorded file-ASI interface......................
Figure 2-28: Equipment connection for verifying the SMPTE310M play operation ...................
Figure 2-29: Equipment connection for verifying the SMPTE310M record operation.................
Figure 2-30: Equipment connection for verifying the recorded file-ASI interface......................
Figure 2-31: Equipment connection for verifying the SPI record operation .............................
Figure 2-32: Equipment setup for Option GbE performance verification................................
Figure 2-33: IP Flow selection................................................................................
Figure 2-34: Clock dialog box ................................................................................
ii MTX100B Specifications and Performance Verification
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