Philips 8000 Series Service Manual page 56

EN 56 7. Q551.1E LA
LVDS
Input
S p e c tru m
R 1 A ~E
LV D S
R e c e iv er
R 1 C L K
R 2 A ~E
R e c e iv er
R 2 C L K
Notes to figure 7-36 TCON block
• LVDS receiver: converts the data stream back into RGB
data and SYNC signals (Vsync, Hsync, Data Enable - DE)
• ODC: Over Drive Circuit - to improve LC response
• Data Path Block: the video RGB data input to data path
block is delayed to align the column driver start pulse with
the column driver data
+ 12V
2010-Jun-25
Circuit Descriptions
S p re a d
O P C O D C
LV D S
2
I C
2
I C
S lav e
M aster
E E P R O M
Figure 7-36 TCON block diagram
diagram:
D C /D C
C o n tro lle r
Figure 7-37 TCON DC/DC converters
S D R A M
1 6 bit
D a ta
P a th
B lo c k
(L in e
B u ffer)
D C A
Ve rtic a l & H o rizo n ta l
Tim in g g e n e ra tio n
H /
R O M
s y n c
V
sync
S S
C L K
DE
• Timing Control Function: generates control signals to
column drivers and row drivers (Source Enable - SOE,
Gate Enable - GOE, Gate Start Pulse - GSP).
For an overview of the TCON DC/DC converters, refer to figure
7-37 TCON DC/DC
L G D
V G H +2 8 V
V G L -6 V
V c c +3 V 3
V c c +1 V 8
Vre f +1 6 V
V d d +1 6 V
back to
div. table
T im in g C o n tro lle r IC
M ini-LVDS
Transmitter
M ini-LVDS
Transmitter
Gate D river
C trl S ign als
Source D river
C trl S ign als
(S p re a d Spectrum C lo c k)
converters.
S H P W h ere U sed
To G a te D riv e rs (G a te
+3 5 V
H ig h Vo lta g e )
To G a te D riv e rs (G a te
-6 V
L o w Vo lta g e )
Tim in g C o n tro lle r IC
+3 V 3
S u p p ly Vo lta g e
Tim in g C o n tro lle r IC
+1 V 2
S u p p ly Vo lta g e
G a m m a R e fe renc e
+1 5 V 2
Vo lta g e
S o u rc e D riv e r S u p p ly
+1 5 V 6
Vo lta g e
M in i-
LVDS
Output
RLV P /N
Right h alf
data
Control
Signal
Output
18770_239_100127.eps
100127
18770_240_100128.eps
100128