Philips 32PFH5500/88 Service Manual page 54

EN 54 8. QM15.2E LA
8.6 Diagram 10-6-10 MHL/HDMI
Block diagram
Si2166
QPSK / 8PSK
Satellite
ZIF Tuner
Pinning information
2015-Sep-30
IC Data Sheets
Input, B10, Si2166-B22 (IC U201)
DiSEqC
2.0
S_ADC_IP
S_ADC_IN
ADC (I)
S_ADC_QP
ADC (Q)
S_ADC_QN
FRONT
END
MP_x
AGCs
Ext. Clk or Xtal
OSC
& PLL
CLK_IN_OUT
TUN_SDA
I C
2
TUN_SCL
SWITCH
36 35 34 33
S_ADC_IP 37
S_ADC_IN 38
S_ADC_QP 39
S_ADC_QN 40
NC 41
NC 42
NC 43
44
CLK_IN_OUT
SDA_MAST 45
SCL_MAST 46
GND 47
VDD_VCORE 48
1 2 3 4
Figure 8-7 Internal block diagram and pin configuration
1.2, 3.3V
DSP &
TM
SYNCHRO
VITERBI
QPSK
EQUAL-
8PSK
IZER
DEMOD
LDPC
DVB-S/S2
FEC MODULE
Si2166B
32 31 30 29 28 27 26 25
24 TS_DATA[6]
23 TS_DATA[5]
22 VDD_VIO
Si2166B 21 GND
20 VDD_VCORE
(GND_PAD)
19 TS_DATA[4]
18 TS_DATA[3]
QFN-48
17 TS_DATA[2]
7x7mm
16 TS_DATA[1]
15 TS_DATA[0]/TS_S
14 TS_CLK
13 TS_SYNC
5 6 7 8 9 10 11 12
back to
div.table
RESETB
CTRL GPIO
TS_ERR/
GPIO_1
RS TS_SYNC
TS_VAL
TS_CLK
TS_DATA
BCH 8
HOST_SDA
I C
2
HOST_SCL
I/F
19790_303.eps