Functional Description; Cpu And Memory; Storage Description; External Flash And Sram - M5Stack M5StickC User Manual

3. FUN 3 NCTIO
This chap pter describ
3.1. CPU 3 AND M
ES SP32-PICO- D4 contains
com mprising:
448-KB of ROM, an

For a 52 20 KB instruc

KB RTC)
RTC flas sh memory o

mode, a and for stori
RTC slow w memory,

sleep m ode
Of 1 kbi it of eFuse, w

set); the e remaining
include encryption
3 3.2. STO RAGE D
3 .2.1. Exte ernal Flas
ES SP32 suppo ort multiple
(S SRAM), havi ng a hardw
da ata.
ESP32 a ccess extern

Flash co ode space is
access, a and can exe
Up to 8 MB externa

for 8-bit t, 16-bit and
support ts read and w
E ESP32-PICO O-D4 4 MB o
sp pace, suppo ort for 8-bit,
ES SP32 of, GPI IO7, GPIO8,
in ntegrated SP PI Flash, not
6
ONAL L DESC
bes the ESP3 32-PICO-D4
MEMOR RY
s two low-p power Xtens
nd the progr ram starts fo
ction and d ata storage
of 8 KB SRA AM, when th
ing data acc cessed by th
of 8 KB SRA AM, can be
which is a 2 256 bit syste
768 bit rese erved for us
and chip ID D
DESCRIP PTION
sh and S RAM
external QS SPI flash and
are-based A AES encrypt
nal QSPI Fla ash and SRA
mapped in nto the CPU,
ecute code.
al Flash and SRAM map
d 32-bit acc ess. Flash su
write opera tions.
of integrated d SPI Flash,
16-bit and 32-bit acce
, GPIO9, GP IO10 and G
t recommen nded for oth
CRIPT TION
4 various mo odules and f
sa ® 32-bit LX
X6 MCU. On
or the kerne el function c
chip SRAM M (including
he RTC can b be started in
he main CPU U
accessed by y the coproc
em-specific (MAC addre
ser program m, these Fla
d static rand dom access
tion to prote ect the user
AM by cachi ng. Up to 1
, supports 8 8-bit, 16-bit
pped to the CPU data s
upports onl y read oper
the code ca an be mapp
ess, and can execute co
PIO11 for c onnecting m
her function ns.
functions.
n-chip mem mory
calls
flash memo ory 8
n Deep-slee ep
cessor in De eep-
ess and a ch hip
ash program m
memory
r programs a and
6 MB extern nal
and 32-bit
pace, suppo ort
rations, SRA AM
ped into CPU U
ode. Pin GPIO O6
module