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Figure 6 Up/down counter operation
4.3.1.2
Switch-on Determination
In the system, turn-on of the power switch depends on the value of the up/down counter, the value of the
zero-crossing counter and the voltage at the ZC pin V
counters is the same and the voltage at the ZC is lower than the threshold V
values from both counters, a digital comparator is used. Once these counters have the same value, the
comparator generates a signal which sets the on/off flip-flop, only when the voltage V
threshold V
.
ZCCT
Another signal which may trigger the digital comparator is the output of a T
maximum off time to avoid the low-frequency operation.
During active burst mode operation, the digital comparator is disabled and no pulse will be generated.
4.3.2
Switch-off Determination
In the converter system, the primary current is sensed by an external shunt resistor, which is connected
between Current Sense pin and the common ground. The sensed voltage across the shunt resistor V
applied to an internal current measurement unit, and its output voltage V
voltage V
. Once the voltage V
FB
power switch is switched off. The relationship between the V
V
G
1
PWM
where G
=3.3, V
PWM
PWM
To avoid mistriggering caused by the voltage spike across the shunt resistor after switch-on of the main
power switch, a 330ns leading edge blanking time (t
4.4
Active Burst Mode Operation
At very low load condition, the CoolSET enters active burst mode operation to minimize the input power.
Details about active burst mode operation are explained in the following paragraphs.
4.4.1
Entering Active Burst Mode Operation
For determination of entering active burst mode operation, three conditions apply:
Design Guide
clock
V
FB
V
FBR1
V
FBZH
V
FBZL
Up/down
counter
Case 1
4
5
Case 2
2
3
Case 3
7
7
exceeds the voltage V
1
V
V
CS
PWM
=0.7
Quasi-resonant CoolSET design guide
T=48ms
6
6
6
6
5
4
4
4
4
4
3
2
7
7
7
7
6
5
. Turn-on happens only when the value in the both
ZC
, the output flip-flop is reset. As a result, the main
FB
and the V
1
) is applied to the output of the comparator.
LEB
11
ICE2QRxx65/80x
t
t
1
3
1
1
1
4
1
. For comparison of the
ZCCT
is lower than the
ZC
clock signal, which limits the
sMax
is compared with the feedback
1
is described by:
CS
8 August 2011
is
CS
[7]
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