Aiwa 4ZG-1 Service Manual page 27

Cd mechanism
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IC, SM5878M
Pin No.
Pin Name
1
MUTE
2
DEEM
3
CKO
4
DVSS
5
BCKI
6
DI
7
DVDD
8
LRCI
9
TSTN
10
TO1
11
AVDDL
12
LO
13
AVSS
14
RO
15
AVDDR
16
MUTEO
17
XVDD
18
XTI
19
XTO
20
XVSS
21
DS
22
RSTN
23
MODE
24
ATCK
I/O
MODE = H: Soft mute ON/OFF terminal. (Mute at H).
I
MODE = L: Attenuator level DOWN/UP terminal. (DOWN at H).
I
De-emphasis ON/OFF terminal. (De-emphasis ON at H).
O
Oscillator clock output. (16.9344 MHz).
Digital VSS terminal.
I
Bit clock input terminal.
I
Serial data input terminal.
Digital VDD terminal.
I
Sample rate clock (fs) input terminal. (H = L ch/L = R ch).
I
Test input. ("H" or open during normal operation)
O
Test output 1. (Normally low level output).
Analog VDD terminal. (For L ch).
O
Left channel analog output terminal.
Analog VSS terminal.
O
Right channel analog output terminal.
Analog VDD terminal. (For R ch).
O
Infinity zero detection output.
X'tal system VDD terminal.
I
X'tal oscillator terminal. (Or external clock input terminal of 16.9344 MHz).
O
X'tal oscillator terminal.
X'tal system VSS terminal.
I
Double-speed/normal playback selection. (Double-speed at H).
I
Reset terminal. (Reset at L).
I
Soft mute/Attenuator mode selection. (Soft mute at H).
I
Attenuator level setup clock (Ignored when MODE = H).
32
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