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Bias Conditions
Item
Supply voltage
Protective transistor bias
No line addition
Substrate voltage
adjustment range
2-line addition
Substrate voltage adjustment accuracy
Reset gate clock
1
Progressive scan mode, 2/8-line readout mode, 2/4-line readout mode, center scan modes (1) and (3),
and AF modes (1) and (2)
2
2-line addition mode and center scan mode (2)
3
V
setting is the V
L
VL
for the V driver should be used.
4
Substrate voltage (V
The substrate voltage (V
The substrate voltage setting value for use with vertical 2-line addition is indicated by a code on the
bottom surface of the image sensor. Adjust the substrate voltage to the indicated voltage.
V
code – 1-digit indication
SUB2
The code and the actual value correspond as follows.
V
code
1
SUB2
Actual value
8.8
V
code
J
SUB2
Actual value
11.8
12.0
[Example] "h" indicates a V
5
Do not apply a DC bias to the reset gate clock pin, because a DC bias is generated within the CCD.
DC characteristics
Item
Supply current
Symbol
V
DD
V
L
1
V
SUB
2
V
SUB2
V
RG
voltage of the vertical clock waveform, or the same voltage as the V
) setting value indication
SUB2
) for modes without line addition is generated internally.
SUB
V
code
SUB2
2
3
4
6
9.0
9.2
9.4
9.6
K
L
m
N
12.2
12.4
12.6
setting of 11.6V.
SUB2
Symbol
I
DD
Min.
14.55
Internally generated value
8.8
Indicated
Indicated
SUB
voltage – 0.2
voltage
7
8
9
A
9.8
10.0
10.2
10.4
P
R
S
U
12.8
13.0
13.2
13.4
Min.
Typ.
7.0
10.0
– 4 –
Typ.
Max.
15.0
15.45
3
14.4
Indicated
voltage + 0.2
5
L
C
d
E
10.6
10.8
11.0
11.2
V
W
X
13.6
13.8
14.0
14.2
Max.
Unit
13.0
mA
ICX274AQ
Unit
Remarks
V
4
V
V
V
power supply
f
G
h
11.4
11.6
Y
Z
14.4
Remarks
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