Go Latch (11. 82.12.1-10. 01. S8.1).
Turned on by service response (I/O
Memory Control B).
Turned off by P3 Response.
Gates the output translator.
Response Gate Latch (11. 83.16.1-10.01. 53.1).
Turned on by a P3 response signal from
Turned off (T2D3) during the cycle follow-
ing its turn on.
Control latch if Write latch is still on
(record mark not yet detected).
Turn on Release latch if a record mark is
detected on the select channel.
Release Latch (11.11.08.1-10.01.49.1).
Turned on by a Response Gate latch during
a plotter write operation when a record
mark (punch EOL) character is detected
on the select channel.
Turned off by I-cycle Reset.
Turns off Write Latch to block further
writing of data.
Write Check Latch (11. 83.24.1).
Turned on by the write VR C error circuits
if an even number of bits are presented to
the output translator.
Turned off by either of the following con-
Depression of Check Reset key on
When tested by a Branch Indicator or
Branch No Indicator operation.
Turn on the Write Check light.
Gate Write Check indicator circuits that
can be tested to cause branching.
DUMP NUMERICALLY (CODE 35--DN)
The 1626 block diagram and the function charts in
the 1620 Systems Diagrams are used to supplement
the following circuit description.
• Transmit numerical information including
flag bits and record marks, from memory
starting at the location designated by the
P address (OR-2) and continuing through
The Dump Numerically operation, Code 35, differs
from Write Numerically operation, Code 38, only
Sensing of a record mark in memory does
not terminate the dump operation.
marks in memory cause conflicting plotter
The dump operation is terminated when the
digit in memory location 19999 has been
transmitted to the plotter.
Termination of the dump operation directs the
computer to enter the I-cycles for the next instruc-
tion in sequence.
The content of every memory location of the first
module is recorded by the plotter
the P address of
the dump instruction is 00000.
See Write Numerically (Code 38 - WN).
WRITE ALPHAMERICALLY (CODE 39 - WA)
The 1626 block diagram and the function charts
contained in the 1620 System Diagrams are used
to supplement the following circuit descriptions.
• With the computer in alphameric mode,
transmit characters stored as two adjacent
digits from the memory locations designa-
ted by the P-address (OR-2) and success-
ively higher pairs of memory locations.
• Decode each two-digit memory character
into the proper numerical, alphabetic, or
• Record the information on the plotter.
During the I -cycles, the Q8 and Q 9 digits of the
instruction are placed in the Digit/Branch register
and decoded to specify the output device. The plotter
is specified by 02.
Output characters are transmitted serially from
memory as two adjacent digits beginning at the mem-
ory locations designated by the P-address minus 1
and the P-address (OR-2) and continuing with suc-