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GR716-BOARD LEON3FT Microcontroller 2019 User's Manual The most important thing we build is trust GR716-BOARD Quick Start Guide GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
GR716 Data sheet and User's Manual [https://www.gaisler.com/doc/gr716/GR716-DS- UM.pdf] RD-4 GRMON User's Manual [https://www.gaisler.com/doc/grmon3.pdf] RD-5 TSIM User's Manual [https://gaisler.com/index.php/products/simulators] RD-10 Bare C Cross-Compilation System [https://www.gaisler.com/index.php/products/operat- ing-systems/bcc] RD-11 BCC User's Manual [https://www.gaisler.com/doc/bcc2.pdf] The referenced documents can be downloaded from https://www.gaisler.com. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
• 1 x TDP interface (SpaceWire time distribution protocol) • Socket for user defined Crystal (5 MHz – 25 MHz) • Option for External Clocks • DIP switch for Bootstrap options The board has the dimension of 80 x 100 mm. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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Figure 2.1. GR716-BOARD Table 2.1. Major board items Item Description Section Reset LED 3V3 power supply LED 1V8 power supply LED Power connector for standalone operation Alternative power connector 3.3.1 Socket for external crystal. JP1 - JP9 Power supply source configuration...
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Figure 2.2. GR716 Development Board GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
• General I/O, SPI flash PROM and Debug-UART are enabled. The complete default configuration can be found in Appendix B and GR716 Development Board User's Manual. If this is your first time using the GR716-BOARD, please use this configuration as a starting point. Default configuration To achieve the default configuration please follow the instructions on each box note like this one.
Bootstrap signals configure the chip at reset and are listed in the section Bootstrap signals of GR716 Data sheet and User's Manual. All of these signals can be controlled on the GR716-BOARD via the SPDT DIP switch S1 position 1 to 8.
Default configuration is to start execute application software from the SPI memory after internal ROM initialization software has executed. The ASW container format is not used by default. Figure 3.2. GR716-BOARD default bootstrap configuration The default configuration of the board uses: •...
• Boot strap option might cause sub-sections of shared pins to be used for memories or remote access. • GR716-BOARD might be connected to hardware not aware of the GR716 e.g. when user has connected the GR716-BOARD with a GR-CPCI-GR716-DEV board.
NOTE: Do NOT connect the USB cable to the host computer until the board is supplied via the the connector J2 or PC/104 style stackable headers. Figure 3.3. Connect to UART debug communication link using the FTDI adapter board For more information on the external FTDI FT423HL chip board, see Section 9.1. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
Bare C Cross-Compiler System is a toolchain to compile bare C or C++ applications di- rectly on top of the processor without the servises provided by an operating system Cobham Gaisler also provides a set of debug tools. The GR716 platform is supported by the following: GRMON Used to run and debug applications on GR716-BOARD hardware.
The previous sections have described which debug-links are available and how to start using them with GRMON. The subsections below assume that GRMON, the host computer and the GR716-BOARD board have been set up so that GRMON can connect to the board.
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GRMON is started with the -u and –cginit 0x00010000 options in order to redirect UART output to the GRMON terminal. $ grmon -u -cginit 0x00010000 -uart /dev/ttyUSB0 GRMON LEON debug monitor v3.0.15 64-bit pro version Copyright (C) 2019 Cobham Gaisler - All rights reserved. For latest updates, go to http://www.gaisler.com/ Comments or bug-reports to support@gaisler.com Device ID:...
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System IO register for GPIO 16 to 23 0x00000000 0x8000d00c System IO register for GPIO 24 to 31 0x00000000 0x8000d010 System IO register for GPIO 32 to 39 0x00000000 0x8000d014 System IO register for GPIO 40 to 47 0x00000000 GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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General Purpose I/O port 0x8030d000 I/O port data register 0x3f000006 0x8030d004 I/O port output register 0x00000000 0x8030d008 I/O port direction register 0x00000000 0x8030d00c I/O interrupt mask register 0x00000000 0x8030d010 I/O interrupt polarity register 0x00000000 GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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Below is information listed for the first UART and the first timer core. Registers for the first AHB- STAT are printed in verbose format. grmon3> info sys uart0 gptimer0 uart0 Cobham Gaisler Generic UART APB: 80300000 - 80300100 IRQ: 24...
GR716 boards. The evaluation version is limited in certain regards compared with the GRMON professional product. GRMON can be downloaded from the GRMON3 homepage [RD-4]. The following table summarizes the GRMON license options for GR716. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
SRAM is possible but slow. • The on-chip boot ROM can be engaged from GRMON with go 0. • When moving software between boards, note that different APBUART and pins are connected to the FTDI UART channels. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
Register description Value -------- -------------------- ----- ASR16 LEONFT register file prot. reg 0x00000000 ASR17 Processor config register 0x00000d1e ASR22 Up counter MSB 0x80000000 ASR23 Up counter LSB 0x00000000 tsim> uart0_status Address Register description Value GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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IP cores and User modules: mctrl_status Print Memory configurations irqmp_status Print irqmp status gptimer0_status Print GPTIMER0 status gptimer1_status Print GPTIMER1 status bootstrap_status Print bootstrap registers uart0_status Print APBUART0 status uart1_status Print APBUART1 status uart2_status Print APBUART2 status GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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"spi1_dbg [<flag>|list|help|clean]" for info gpio0_status print gpio ctrl 0 status information gpio0_dbg activate dbg output, "gpio0_dbg [<flag>|list|help|clean]" for info gpio1_status print gpio ctrl 1 status information gpio1_dbg activate dbg output, "gpio1_dbg [<flag>|list|help|clean]" for info GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
BCC together with the GR716 Development Board. It will be demonstrated how to build an an example program and run it on the GR716-BOARD using GRMON. The BCC toolchain includes the GNU C/C++ cross-compiler 7.2.0, GNU Binutils, Newlib embedded C library, the Bare-C run-time system with LEON support and the GNU debugger (GDB).
Once your application is compiled, start TSIM with the -gr716 option. The following log shows how to load and run an application. tsim-leon3 -gr716 TSIM/LEON3 SPARC simulator, version [...] Copyright (C) 2019, Cobham Gaisler - all rights reserved. For latest updates, go to http://www.gaisler.com/ Comments or bug-reports to support@gaisler.com [...] tsim>...
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Program exited normally. Alternatively you can run TSIM with the -gdb command line option and then attach a GDB session to it. For further information see Chapter 3 of [RD-11]. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
8. Software examples This chapter will describe a software example collection applicable for GR716 and GR716-BOARD applications. The approach is to provide a starting point for integrating different IO functionality with an application. 8.1. Overview 8.1.1. BCC device driver library BCC ([RD-10]) includes a device driver library which can be used on different LEON systems.
The below example demonstrates how the function set_pinfunc() can be used to configure a pin for UART operation. It has the same effect as Example 8.2. Example 8.4. #include <stdio.h> #include <pinhelper.h> int main(void) int ret; GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
LVDS External Loop 14:13 LVDS production test enable Support Locked transfers in SCRUBBER Force Scrubber on main bus 10:9 prot Interrupt test protection bits Generate interrupt Disable reset signal from MIL core Disable reset request GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
Note that the memscrub device is backwards compatible with the ahbstat device. Thus the AHB status register driver can be used with the memscrub device, with limited functionality. In the transcript below, the device named ahbstat2 is the same as memscrub0. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
The following prepares to run the example with apbuart3 with UART TX output on GPIO35 and UART RX input on GPIO36. Connect a terminal to apbuart3 and set 115200 BAUD. When using GR716-BOARD, and the serial communication program Minicom, the following can be used: $ minicom -D /dev/ttyUSB2 -b 115200 Clock enable apbuart3.
(SPIMCTRL) typically named spim0 and spim1. These four controllers operate independently. GR716-BOARD has SPI flash memory connected to the SPI memory controller spim0. The SPI controllers (spi0 and spi1) are not connected to any SPI slave devices on the GR716-BOARD.
The driver is general enough to work with most I2C peripherals such as temperature sensors, ADC, DAC, etc. 8.4.8.1. GR716-BOARD current measurement GR716-BOARD has two current measurement devices with I2C interface. The I2C bus of these devices are not directly connected to the GR716. However, the buses are available on the expansion headers which allows to connect the current measurement by fitting jumpers on the connector.
The example assumes that the GR716 CAN external signals are connected to CAN transceivers. They could be connected to the same external CAN bus. When using the GR716-DEV board, the CAN accessory board can be used. 8.4.10.1. Build cd $BCC/src/libdrv/examples/grcan make BSP=gr716 GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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MSGDATA[1]: 0x68 0x65 0x6c 0x6c 0x6f hello MSG[2]: STD length: 5, id: 0x5 MSGDATA[2]: 0x77 0x6f 0x72 0x6c 0x64 world grcan0: --- receive end grcan1: --- receive begin --- MSG[1]: STD length: 4, id: 0x6 GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
$EXAMPLE/common/adchelper.c, allowing to perform common ADC con- figuration and operations. It is used in the example. 8.5.1.2. Preparation Connect an analog input source to the board connector corresponding to ADC input 0. 8.5.1.3. Build cd $EXAMPLE/adc GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
It is recommended to refer to the clock distribution scheme figure in GR716 Data sheet and User's Manual when studying the support library. 8.5.2.2. Preparation Connect the pin EXT_PLL to a clock source. This is part of the GR716-BOARD default configuration. 8.5.2.3. Build cd $EXAMPLE/clock make 8.5.2.4.
8.6. Boot loader The GR716 on-chip ROM contains a boot loader which is engaged on power-on. The boot loader can copy a user application image from non-volatile external memory to on-chip RAM and start executing. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
Application Storage Memory without the need for re-generating. This is independent of the -a parameter. 8.6.2.2. BCH generation tool A script named $EXAMPLE/scripts/bchfile.tcl is available for generating BCH check bytes to arbitrary input data. Command line parameter syntax for bchfile.tcl is: bchfile.tcl [-elf] [-a ADDRESS] SOURCE DEST SIZE GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
The IO validation and configuration script prints the following sections and information: • IO configuration register constants. The IO configuration constants can be used to update the IO registers in order to set the target configuration. GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
The GR716 Development Board can be configured to use external SRAM, FLASH and SPI memory. To extend the GR716-BOARD and for correct board configuration, see Section 9.2. External SRAM and FLASH memory shares address and data pins. The script will issue a warning which the user needs to check before programming the IO configuration registers.
8.9. Resources Table 8.1. GR716 software examples resources GR716-AN-0002 External ROM Memory boot option using the GR716 [https://www.gaisler.com/index.php/ products/components/gr716] GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
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GR716-AN-0003 SPI Memory boot option using the GR716 [https://www.gaisler.com/index.php/prod- ucts/components/gr716] GR716-BP GR716 Quick Start Guide Board Package, gr716-examples-<DATE>.zip [https:// www.gaisler.com/index.php/products/components/gr716] GR716-BOARD-QSG www.cobham.com/gaisler April 2019, Version 1.0...
9. Expansion boards This section provides an overview of expansion boards which can be attached to the GR716-BOARD expansion connectors. 9.1. DSU UART FTDI The GR716-DSU-USB board can be connected to the GR716-BOARD to: • Debug UART to USB conversion supported by GRMON (Chapter 5).
Best practice is to connected the GR716-TEST-MEMORY board to the GR716-BOARD via the PC/104 style stackable headers on the backside as shown in Figure 9.2. Figure 9.2. GR716 Board with a GR716 Memory board with a GR716 Memory board connected via the PC/104 connector on the backside.
10. Support For support contact the Cobham Gaisler support team at support@gaisler.com. When contacting support, please identify yourself in full, including company affiliation and site name and address. Please identify exactly what product that is used, specifying if it is an IP core (with full name of the library distribution archive file), component, software version, compiler version, operating system version, debug tool version, simulator tool version, board version, etc.
Select power supply for internal PLL Select power supply for internal LDO Select power supply for internal CORE Select internal reference NOTE: Always leave JP8 open when connecting GR716-BOARD with the GR716- DEV board. External Reference sense JP10 Select system clock source...
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Cobham convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Cobham or of third parties. All information is provided as is. There is no warranty that it is correct or suitable for any purpose, neither implicit nor explicit.
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