Main Block Diagram - Panasonic TH-50PZ750U Service Manual

TH-50PZ750U

15.2. Main Block Diagram

K
REMOTE/LED/KEY SW
POWER LED
REMOTE RECEIVER
AI SENSOR
K2
S POWER SW
POWER
STB_PS
S2
SWITCH
SCAN OUT
SU
KEY SCAN
(UP)
AV3 IN
Y,C,V
S.R
S-VIDEO IN
64
VIDEO IN
L/R
AUDIO IN
G AV3 IN
S.R
64
S.R
64
S.R
64
S.R
64
SC
SCAN DRIVE
S.R
CONTROL
64
PULSE
S.R
64
S.R
64
SUSTAIN
PULSE
S.R
28
S.R
28 SCAN
PULSE
S.R
64
S.R
64
VOLTAGE
GENERATOR
S.R
64
SOS6
SOS7
S.R
64
S.R
64
S.R
64
S.R
64
AC CORD
S.R
64
SCAN OUT
SD
(DOWN)
SOS
PB31
FAN
PB32
PB30
DRIVE
PB37
7V
AVR
PB
FAN CONTROL
TH-50PZ750U
Main Block Diagram
S.R. S.R.
C1 DATA DRIVER(RIGHT)
K1
H8
DG1
H51
SPEAKER
G51
H264 SPDIF
SQ-L
L
H264 L/R
SPEAKER
H11
L
AMP
W-L
SQ-R
R
SOUND
SPEAKER
AMP
H12 PROCESSOR
R
AMP
W-R
DTV
OPTICAL
MAIN_L/R
AUDIO OUT
SOUND_SOS
V
MONITOR
L/R
OUT
L/R
PC
H3 DG3
AUDIO
AUDIO IN
SW
L/R
DVI
AUDIO IN
L/R
VIDEO1
Y,C,V
SOS
L/R
VIDEO2 Y,C,V
L/R
COMP1
Y,Pb,Pr
VIDEO
L/R
SW
COMP2
Y,Pb,Pr SUB SUB
MAIN MAIN
R,G,B
PC IN
FAN_SOS POWER_SOS
H30
DG
+15V
H5
SOUND15V DIGITAL
SIGNAL
SUB5V
H10 DC-DC
MAIN9V
PROCESSOR
CONVERTER
F+15V SUB9V
H
AV TERMINAL
AV SWITCH
SC20
+15V
P10 F_STB+15V
P POWER SUPPLY
P5 +15V
VSUS
SC2 P2
PROTECTION(SOS)
STANDBY STANDBY
STB12V
RECTIFIER VOLTAGE VOLTAGE
STB5V
CONTROL RECTIFIER
PROCESS
VOLTAGE
CONTROL
LINE
FILTER
RELAY
POWER SUSTAIN
LINE
P9 RECTIFIER FACTOR VOLTAGE
FILTER
CONTROL CONTROL
C6
DATA DRIVER(RIGHT)
S.R.
S.R. S.R.
S.R. S.R. S.R. S.R. S.R. S.R.
VDA_75V VDA_75V
C11 C22
C2 DATA DRIVER(CENTER)
C10
TV
TUNER
DDR2x2
VCXO X'tal [27MHz]
FRONT
CH0DATA
END DC/DC DC/DC DC/DC
3.3V 1.8V 1.2V
PRO.
BOOT NOR
ROM FLASH
DTV_SDIN
GP5P_1st
Peaks-Lite 2 DDR
ICEOUT
OSD
FPGA
(CYCLONE)
MAIN
MICON DG5
Genx4
D5
DTV_V
LVDS format
*CLK
*RGB:10bit(or8bit)
*VD,HD
SUB MAIN
GC3FS
DISPEN
DG
D3
35
HDMI_SDIN
HDMI_SPDIF
PROM
(4MByte)
HDMI HDMI IN 1
AD/HDMI
HDMI
EQ DCLK
HDMI IN 2
ASDIO
DATA0
DRVRST
GH HDMI3 IN
MICOM SOS8
HDMI
DG11 GH11 HDMI 3
EQ
Discharge
Control(SC)
D20 WRITE PROTECT
SOS6
SOS7
+15V
P_ON/OFF
+5V D25 DC/DC CONVERTER
STBY5V_M
P25 REG STB3.3V
+15V
RESET
RESET
PS_SOS
D FORMAT CONVERTER,
PLASMA AI PROCESSOR
VDA
PROCESS 15V
VOLTAGE
12V
RECTIFIER
5V
+15V
P12
Vda
SUSTAIN
VSUS
VOLTAGE P11
RECTIFIER
C60
C5
DATA DRIVER(CENTER)
VDA_75V
C61 C52
VDA_75V
S.R. S.R. S.R. S.R. S.R. S.R.
78
S.R. S.R. S.R. S.R. S.R. S.R.
C21 C31
VDA_75V
C3 DATA DRIVER(LEFT)
C24 C25 C35
JG H264 DECODER
H264 L/R
JG10 EQ AUDIO D/A
H264 SPDIF
Peaks-
JG08 LVDS TX PRO
JG09
USB
RECEIVER
DG52
DG9
DG8
D31 D32 D33 SD CARD I/F
USB TRANSMITTER
P5V P5V P5V
GS52
PCLK/NCLK
GS SD CARD I/F
32Mbit Vda
RESET
Flash-ROM
SS35
FLASH CONTROL
Vda
Data Driver
Control
128Mbit
DDR
SS
CLOCK
PD1-M plus
GENERATOR
*Sub Filed Processor SUSTAIN DRIVE
FPGA
R[9:0] *Plasma AI
*Discharge Control
G[9:0]
*H,V Snyc Control
B[9:0],HD,VD
*LVDS receiver
DCK
Discharge
Control(SS)
Data Driver
ADDRESS
Control
VOLTAGE
(VE)
SUSTAIN
XRST
PULSE
IIC2
ERASE
PULSE
TEMP
64k
SENSOR
EEPROM
P3.3V
SUS
P2.5V
P1.2V SIGNAL
PCLK/NCLK
15V
P5V P5V P5V Vda
SS42
SOS8
D36 D35 D34
VSUS
SS12 SS11
SS44
Vda
Vda
C54 C55 C42
C4 DATA DRIVER(LEFT)
VDA_75V
C51 C41
S.R. S.R. S.R. S.R. S.R.
S.R.
BOOT NOR
ROM FLASH
JG19
GS09
BOOT
ROM
SD
SW CARD
SLOT
C44
S.R.
TH-50PZ750U
Main Block Diagram