Tews Technologies TPMC465 User Manual

8 channel rs232/rs422/rs485 programmable serial interface

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The Embedded I/O Company
TPMC465
8 Channel RS232/RS422/RS485
Programmable Serial Interface
User Manual
TEWS TECHNOLOGIES GmbH
TEWS TECHNOLOGIES LLC

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Summary of Contents for Tews Technologies TPMC465

  • Page 1 The Embedded I/O Company TPMC465 8 Channel RS232/RS422/RS485 Programmable Serial Interface User Manual TEWS TECHNOLOGIES GmbH TEWS TECHNOLOGIES LLC...
  • Page 2 TPMC465-10 Style Conventions...
  • Page 3 Issue Description Date...
  • Page 4: Table Of Contents

    Table of Contents PRODUCT DESCRIPTION ..................6 TECHNICAL SPECIFICATION................... 7 LOCAL SPACE ADDRESSING.................. 8 3.1 XR17D158 Local Space Configuration..................8 3.2 Device Configuration Space ......................8 XR17D158 TARGET CHIP ..................13 4.1 PCI Configuration Registers (PCR) .....................13 4.2 Configuration EEPROM........................14 CONFIGURATION HINTS ..................16 5.1 CPLD Description..........................16 5.2 CPLD Access..........................17 5.3 Serial Interface Channel Setup ....................20...
  • Page 5 Table of Figures...
  • Page 6: Product Description

    1 Product Description...
  • Page 7: Technical Specification

    2 Technical Specification PMC Interface Mechanical Interface Electrical Interface On Board Devices PCI Target Chip Octal UART Transceiver I/O Interface Interface Type Number of Channels Physical Interface Serial Channel I/O Signals Termination Ω Programmable Baud Rates ESD Protection I/O Connector Physical Data Power Requirements Temperature Range...
  • Page 8: Local Space Addressing

    3 Local Space Addressing 3.1 XR17D158 Local Space Configuration XR17D158 PCI Base Size Port Endian Description Address Space Width Mode (Byte) Mapping (Offset in PCI (Bit) Configuration Space) 3.2 Device Configuration Space PCI Base Address: XR17D158 PCI Base Address 0 (Offset 0x10 in PCI Configuration Space).
  • Page 9 3.2.1 UART Register Sets UART Register Set Register Set Offset Offset Address Description Access Data Width...
  • Page 10 3.2.2 Device Configuration Registers Address Register Description Access Reset Value...
  • Page 11 3.2.3 UART Channel Configuration Registers Register Comment Register Access Reset Offset Value...
  • Page 12 The address for a UART Channel Configuration Register x in a UART Register Set for channel y PCI Base Address 0 (PCI Base Address for the UART Register Space) + UART Register Set Offset for channel y + Register Offset for register x...
  • Page 13: Xr17D158 Target Chip

    4 XR17D158 Target Chip 4.1 PCI Configuration Registers (PCR) PCI CFG Write ‘0’ to all unused (Reserved) bits Initial Values Register writeable (Hex Values) Address...
  • Page 14: Configuration Eeprom

    4.2 Configuration EEPROM Configuration Address Configuration Register Register Offset Value...
  • Page 15 Address Configuration Register TPMC465-10...
  • Page 16: Configuration Hints

    5 Configuration Hints 5.1 CPLD Description 5.1.1 CPLD Address Map Address Register Name Size (Bit) 5.1.2 Channel Control Register Symbol Description Access Reset Value Ω Ω...
  • Page 17: Cpld Access

    5.2 CPLD Access MPIO Pin Direction Function...
  • Page 18 5.2.1 Accessing XR17D158 MPIO Pins Address Register Description Access Reset Offset Value 5.2.2 CPLD Bus Protocol 5.2.2.1 Write...
  • Page 19 define MPIOLVL 0x90; define MPIOSEL 0x93; void Write_XR17D158(int address, int value); Write_XR17D158(MPIOSEL, 0x80); // Setting up MPIOSEL Write_XR17D158(MPIOLVL, 0x19); // CEN = ‘1’, ADR = "011”, D(6) = ‘0’ Write_XR17D158(MPIOLVL, 0x1D); // CLK = ‘1’ Write_XR17D158(MPIOLVL, 0x01); // CLK = ‘0’, ADR = “000”, D(5) = ‘0’ Write_XR17D158(MPIOLVL, 0x05);...
  • Page 20: Serial Interface Channel Setup

    define MPIOLVL 0x90; define MPIOSEL 0x93; Read_XR17D158(int address); // Returns the address’ bit 7 value Write_XR17D158(MPIOSEL, 0x80); // Setting up MPIOSEL Write_XR17D158(MPIOLVL, 0x1B); // CEN = ‘1’, ADR = "011”, R/W# = ‘1’ Write_XR17D158(MPIOLVL, 0x1F); // CLK = ‘1’ Write_XR17D158(MPIOLVL, 0x03); // CLK = ‘0’, ADR = “000”...
  • Page 21 5.3.1.2 RS485 Receiver Control 5.3.1.3 Slew Rate Limiting 5.3.1.4 Low-Power Shutdown...
  • Page 22 5.3.2 Channel Setup Symbol CPLD Channel Control Register XR17D158 Feature Control Register (FCTR)
  • Page 23: Rs485/Rs422 Configuration Examples

    5.4 RS485/RS422 Configuration Examples 5.4.1 RS422 Multidrop RS485 HDPLX RENA RTERM TTERM FCTR[5] 5.4.2 RS422 Full Duplex Point to Point RS485 HDPLX RENA RTERM TTERM FCTR[5] 5.4.3 RS485 Full Duplex Point to Point RS485 HDPLX RENA RTERM TTERM FCTR[5]...
  • Page 24 5.4.4 RS485 Half Duplex Point to Point RS485 HDPLX RENA RTERM TTERM FCTR[5] 5.4.5 RS485 Full Duplex Multi-point Master RS485 HDPLX RENA RTERM TTERM FCTR[5] Slave RS485 HDPLX RENA RTERM TTERM FCTR[5]...
  • Page 25: I/O Electrical Interface

    5.4.6 RS485 Half Duplex Multi-point RS485 HDPLX RENA RTERM TTERM FCTR[5] 5.5 I/O Electrical Interface 5.5.1 ±15kV ESD Protection 5.5.2 RS232 Transceivers Ω Ω 5.5.3 RS485/RS422 Transceivers...
  • Page 26: Block Diagram

    5.5.4 Termination Ω Block Diagram...
  • Page 27: Programming Hints

    6 Programming Hints 6.1 UART Baud Rate Programming 2368 Divisor Baud Rate Baud Rate Divisor MCR[7] = 0 MCR[7] = 1 Value Value 2368 Baud Rate...
  • Page 28 Note that the maximum baud rate for RS232 channel is 921.6 kps. Thus the minimum divisor value for RS232 channels is 0x0003 with MCR[7] = 0.
  • Page 29: Pin Assignment - I/O Connector

    I/O connector and P14 back I/O connector at the same time. Please note that on the TPMC465 the P14 back I/O connector is always populated and connected to on board logic. Do not use these modules on carrier boards where P14/J14 is reserved for other system signals but PMC I/O.
  • Page 30: Back I/O Pmc Connector (P14)

    7.2 Back I/O PMC Connector (P14) RS232 RS485/RS422 RS232 RS485/RS422...

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