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PRODUCT FEATURES
Highlights
Single-Chip Ethernet Physical Layer Transceiver
(PHY)
Comprehensive flexPWR
— Flexible Power Management Architecture
— Power savings of up to 40% compared to competition
— LVCMOS Variable I/O voltage range: +1.6V to +3.6V
— Integrated 1.2V regulator with disable feature
HP Auto-MDIX support
Small footprint 32 pin QFN lead-free RoHS compliant
package (5 x 5 x 0.9mm height)
Target Applications
Set-Top Boxes
Networked Printers and Servers
Test Instrumentation
LAN on Motherboard
Embedded Telecom Applications
Video Record/Playback Systems
Cable Modems/Routers
DSL Modems/Routers
Digital Video Recorders
IP and Video Phones
Wireless Access Points
Digital Televisions
Digital Media Adaptors/Servers
Gaming Consoles
POE Applications
SMSC LAN8710/LAN8710i
MII/RMII 10/100 Ethernet
Transceiver with HP Auto-MDIX
and flexPWR
Small Footprint
®
Technology
DATASHEET
LAN8710/LAN8710i
®
Technology in a
Key Benefits
High-Performance 10/100 Ethernet Transceiver
— Compliant with IEEE802.3/802.3u (Fast Ethernet)
— Compliant with ISO 802-3/IEEE 802.3 (10BASE-T)
— Loop-back modes
— Auto-negotiation
— Automatic polarity detection and correction
— Link status change wake-up detection
— Vendor specific register functions
— Supports both MII and the reduced pin count RMII
interfaces
Power and I/Os
— Various low power modes
— Integrated power-on reset circuit
— Two status LED outputs
— Latch-Up Performance Exceeds 150mA per EIA/JESD
78, Class II
— May be used with a single 3.3V supply
Packaging
— 32-pin QFN (5x5 mm) Lead-Free RoHS Compliant
package with MII and RMII
Environmental
— Extended Commercial Temperature Range (0°C to
+85°C)
— Industrial Temperature Range (-40°C to +85°C) version
available (LAN8710i)
Datasheet
Revision 1.0 (04-15-09)
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Table of Contents
Related Manuals for SMSC FlexPWR LAN8710
Summary of Contents for SMSC FlexPWR LAN8710
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Page 1: Product Features
DSL Modems/Routers Digital Video Recorders IP and Video Phones Wireless Access Points Digital Televisions Digital Media Adaptors/Servers Gaming Consoles POE Applications SMSC LAN8710/LAN8710i LAN8710/LAN8710i MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX ® and flexPWR Technology in a Small Footprint Key Benefits High-Performance 10/100 Ethernet Transceiver —... - Page 2 Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com.
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Page 3: Table Of Contents
Auto-negotiation ............. . . 28 SMSC LAN8710/LAN8710i ®... - Page 4 Power Supply Diagram ..........74 Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i...
- Page 5 Chapter 9 Package Outline ........... 76 SMSC LAN8710/LAN8710i ®...
- Page 6 Figure 9.3 Tape Length and Part Quantity ..........79 Revision 1.0 (04-15-09) SMSC LAN8710/LAN8710i DATASHEET...
- Page 7 Table 5.41 Pin Names for Mode Bits ........... . . 53 SMSC LAN8710/LAN8710i Revision 1.0 (04-15-09)
- Page 8 Table 9.1 32 Terminal QFN Package Parameters......... . 76 Revision 1.0 (04-15-09) SMSC LAN8710/LAN8710i DATASHEET...
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Page 9: Chapter 1 Introduction
The LAN8710 referenced throughout this document applies to both the extended commercial temperature and industrial temperature components. The LAN8710i refers to only the industrial temperature component. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 8-bits First In First Out buffer;... -
Page 10: Architectural Overview
802.3-2005 compliant and vendor-specific register functions. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR LAN8710 Ethernet Transceiver LED Status Crystal or Clock Osc DATASHEET ® Technology in a Small Footprint Datasheet Transformer RJ45 Section 5.3.9. In addition, SMSC LAN8710/LAN8710i... -
Page 11: Figure 1.2 Lan8710/Lan8710I Architectural Overview
Logic TXCLK RXD[0:3] RXDV Receive Section RXER RXCLK 10M Rx Logic COL/CRS_DV MDIO Figure 1.2 LAN8710/LAN8710i Architectural Overview SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Auto- 10M Tx Logic Transmitter Transmit Section 100M Tx 100M Logic Transmitter DSP System:... -
Page 12: Chapter 2 Pin Configuration
Figure 2.1 LAN8710/LAN8710i 32-QFN Pin Assignments (TOP VIEW) Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR TXD2 TXD1 TXD0 SMSC LAN8710/LAN8710i TXEN 32 PIN QFN TXCLK (Top View) nRST nINT/TXER/TXD4 DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i... -
Page 13: Table 2.1 Lan8710/Lan8710I 32-Pin Qfn Pinout
PIN NAME VDD2A LED2/nINTSEL LED1/REGOFF XTAL2 XTAL1/CLKIN VDDCR RXCLK//PHYAD1 RXD3/PHYAD2 RXD2/RMIISEL RXD1/MODE1 RXD0/MODE0 VDDIO RXER/RXD4/PHYAD0 COL/CRS_DV/MODE2 MDIO SMSC LAN8710/LAN8710i ® Technology in a Small Footprint PIN NO. nINT/TXER/TXD4 DATASHEET PIN NAME nRST TXCLK TXEN TXD0 TXD1 TXD2 TXD3 RXDV VDD1A RBIAS Revision 1.0 (04-15-09) -
Page 14: Chapter 3 Pin Description
Transmit Data 0: The MAC transmits data to the transceiver using this signal in all modes. Transmit Data 1: The MAC transmits data to the transceiver using this signal in all modes DATASHEET ® Technology in a Small Footprint Datasheet LAN8710/LAN8710i SMSC LAN8710/LAN8710i... - Page 15 MODE1 RXD2/ IOPD RMIISEL RXD3/ IOPD PHYAD2 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION Transmit Data 2: The MAC transmits data to the transceiver using this signal in MII Mode. This signal should be grounded in RMII Mode.
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Page 16: Led Signals
When LED1/REGOFF is pulled high to VDD2A with an external resistor, the internal regulator is disabled. When LED1/REGOFF is floating or pulled low, the internal regulator is enabled (default). DATASHEET ® Technology in a Small Footprint Datasheet 4.9, this pin is sampled during the SMSC LAN8710/LAN8710i... -
Page 17: Management Signals
10/100 Line Interface Signals Table 3.6 10/100 Line Interface Signals 32-QFN SIGNAL 32-QFN NAME PIN # TYPE SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION LED2 – Link Speed LED Indication. Section 5.3.7 for a description of LED modes. -
Page 18: Analog Reference
+3.3V Analog Port Power to Channel 2 and to internal regulator. The flag must be connected to the ground plane with a via array under the exposed flag. This is the ground connection for the IC. DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i... -
Page 19: Chapter 4 Architecture Details
For RMII, the MAC controller drives the transmit data onto the TXD bus and asserts TXEN to indicate valid data. The data is latched by the transceiver’s RMII block on the rising edge of REF_CLK. The data is in the form of 2-bit wide 50MHz data. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint... -
Page 20: 5B Encoding
Sent for rising TXEN Sent for falling TXEN DATASHEET ® Technology in a Small Footprint Datasheet Table 4.1. Each 4-bit data-nibble TRANSMITTER INTERPRETATION 0000 DATA 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 SMSC LAN8710/LAN8710i... -
Page 21: Scrambling
T and 100Base-TX signals pass through the same transformer so that common “magnetics” can be used for both. The transmitter drives into the 100Ω impedance of the CAT-5 cable. Cable termination and impedance matching require external components. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 4.1 4B/5B Code Table (continued) -
Page 22: 100M Phase Lock Loop (Pll)
Figure 4.2 Receive Data Path Figure 4.2. Detailed descriptions are given below. DATASHEET ® Technology in a Small Footprint Datasheet S cram bler 25M H z by 5 bits and P IS O D river C A T-5 M LT-3 SMSC LAN8710/LAN8710i... -
Page 23: Nrzi And Mlt-3 Decoding
/T/R/ delimiter is recognized or link test indicates failure or SIGDET becomes false. RXDV is asserted when the first nibble of translated /J/K/ is ready for transfer over the Media Independent Interface (MII mode). SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DATASHEET Revision 1.0 (04-15-09) -
Page 24: Receiver Errors
The data is in the form of 4-bit wide 2.5MHz data. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR data data data data data data data data DATASHEET ® Technology in a Small Footprint Datasheet Idle SMSC LAN8710/LAN8710i... -
Page 25: Manchester Encoding
Manchester encoded data is extracted and converted to a 10MHz NRZI data stream. It is then converted from serial to 4-bit wide parallel data. The RX10M block also detects valid 10Base-T IDLE signals - Normal Link Pulses (NLPs) - to maintain the link. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 49, for more details. -
Page 26: 10M Receive Data Across The Mii/Rmii Interface
RXDV high. The transceiver drives RXER high when a receive error is detected. 4.6.2 RMII The SMSC LAN8710 supports the low pin count Reduced Media Independent Interface (RMII) intended for use between Ethernet transceivers and Switch ASICs. Under IEEE 802.3, an MII Revision 1.0 (04-15-09) -
Page 27: Mii Vs. Rmii Configuration
Section 5.3.9.3. Most of the MII and RMII pins are multiplexed. relationship of the related device pins to the MII and RMII mode signal names. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 4.2, "MII/RMII Signal Mapping" DATASHEET describes the Revision 1.0 (04-15-09) -
Page 28: Auto-Negotiation
TXEN RXER RXD0 RXD1 TXD2 TXD3 TXER/ TXD4 RXDV RXD2 RXD3 TXCLK RXCLK XTAL1/CLKIN DATASHEET ® Technology in a Small Footprint Datasheet RMII MODE TXD0 TXD1 TXEN RXER Note 4.2 CRS_DV RXD0 RXD1 Note 4.1 Note 4.1 REF_CLK SMSC LAN8710/LAN8710i... - Page 29 The capabilities advertised during auto-negotiation by the transceiver are initially determined by the logic levels latched on the MODE[2:0] bus after reset completes. This bus can also be used to disable auto-negotiation on power-up. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DATASHEET Revision 1.0 (04-15-09)
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Page 30: Parallel Detection
TXP/TXN and RXP/RXN pins for correct transceiver operation. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR In this mode, If data is received while the transceiver is Figure 4.4, the SMSC LAN8710/LAN8710i Auto-MDIX DATASHEET ® Technology in a Small Footprint Datasheet... -
Page 31: Internal +1.2V Regulator Disable
LED1/REGOFF pin is floating. During VDDIO and VDDA power-on, if the LED1/REGOFF pin is sampled below V +1.2V regulator will turn on and operate with power from the VDD2A pin. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint... -
Page 32: Nintsel Strapping And Led Polarity Selection
Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Figure 4.5. nINTSEL = 0 LED output = active high Figure 4.5 nINTSEL Strapping on LED2 DATASHEET ® Technology in a Small Footprint Datasheet LED2/nINTSEL ~270 ohms SMSC LAN8710/LAN8710i... -
Page 33: Phy Address Strapping
A special feature (enabled by register 17 bit 3) forces the transceiver to disregard the PHY-Address in the SMI packet causing the transceiver to respond to any address. This feature is useful in multi-PHY SMSC LAN8710/LAN8710i ® Technology in a Small Footprint... -
Page 34: Figure 4.7 Mdio Timing And Frame Structure - Read Cycle
A4 A3 A2 A1 A0 R4 R3 R2 R1 R0 PHY Address Register Address Data To Phy DATASHEET ® Technology in a Small Footprint Datasheet Section 6.1, "Serial Management Turn Data Around Data From Phy Turn Data Around SMSC LAN8710/LAN8710i... -
Page 35: Chapter 5 Smi Register Mapping
Chapter 5 SMI Register Mapping Reset Loopback Speed Select Enable 100Base 100Base 100Base 10Base- Full Half Full Duplex Duplex Duplex PHY ID Number (Bits 3-18 of the Organizationally Unique Identifier - OUI) PHY ID Number (Bits 19-24 of the Organizationally Unique Identifier - OUI) Table 5.1 Control Register: Register 0 (Basic) Power... -
Page 36: Table 5.5 Auto-Negotiation Advertisement: Register 4 (Extended)
Table 5.5 Auto-Negotiation Advertisement: Register 4 (Extended) Next Reserved Remote Reserved Page Fault Table 5.6 Auto-Negotiation Link Partner Base Page Ability Register: Register 5 (Extended) Next Acknowledge Remote Reserved Page Fault Table 5.7 Auto-Negotiation Expansion Register: Register 6 (Extended) Reserved Reserved Pause 100Base-... -
Page 37: Table 5.10 Mode Control/ Status Register 17: Vendor-Specific
Table 5.10 Mode Control/ Status Register 17: Vendor-Specific RSVD EDPWRDOWN RSVD LOWSQEN RSVD = Reserved Reserved MIIMODE Table 5.14 Symbol Error Counter Register 26: Vendor-Specific MDPREBP FARLOOPBACK RSVD ALTINT Table 5.11 Special Modes Register 18: Vendor-Specific Reserved Table 5.12 Register 24: Vendor-Specific Reserved Table 5.13 Register 25: Vendor-Specific Reserved... -
Page 38: Table 5.15 Special Control/Status Indications Register 27: Vendor-Specific
Table 5.15 Special Control/Status Indications Register 27: Vendor-Specific AMDIXCTRL Reserved CH_SELECT Table 5.16 Special Internal Testability Control Register 28: Vendor-Specific Reserved Reserved Table 5.19 PHY Special Control/Status Register 31: Vendor-Specific Reserved Autodone Reserved GPO2 Reserved SQEOFF Reserved Table 5.17 Interrupt Source Flags Register 29: Vendor-Specific INT7 INT6 Table 5.18 Interrupt Mask Register 30: Vendor-Specific... -
Page 39: Smi Register Format
LH = Latch high, clear on read of register, LL = Latch low, clear on read of register, NASR = Not Affected by Software Reset X = Either a 1 or 0. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 5.20 SMI Register Mapping... -
Page 40: Table 5.21 Register 0 - Basic Control
(overrides 0.13 and 0.8) Table 5.22 Register 1 - Basic Status DESCRIPTION DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT Set by MODE[2:0] Set by MODE[2:0] Set by MODE[2:0] MODE DEFAULT SMSC LAN8710/LAN8710i... -
Page 41: Table 5.23 Register 2 - Phy Identifier 1
Reserved 4.13 Remote Fault 4.12 Reserved 4.11:10 Pause Operation SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION Table 5.23 Register 2 - PHY Identifier 1 DESCRIPTION Assigned to the 3rd through 18th bits of the Organizationally Unique Identifier (OUI), respectively. -
Page 42: Table 5.26 Register 5 - Auto Negotiation Link Partner Ability
0 = no 10Mbps with full duplex ability 1 = 10Mbps able, 0 = no 10Mbps ability [00001] = IEEE 802.3 DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT Set by MODE[2:0] Set by MODE[2:0] Set by MODE[2:0] 00001 MODE DEFAULT 00001 SMSC LAN8710/LAN8710i... -
Page 43: Table 5.27 Register 6 - Auto Negotiation Expansion
17.10 MDPREBP 17.9 FARLOOPBACK 17.8:7 Reserved SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION 1 = fault detected by parallel detection logic 0 = no fault detected by parallel detection logic 1 = link partner has next page ability... -
Page 44: Table 5.30 Register 18 - Special Modes
It does not increment in 10Base-T mode. DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT MODE DEFAULT NASR 000000 NASR Section NASR PHYAD NASR MODE DEFAULT SMSC LAN8710/LAN8710i... -
Page 45: Table 5.33 Register 28 - Special Internal Testability Controls
INT6 29.5 INT5 29.4 INT4 29.3 INT3 29.2 INT2 SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DESCRIPTION HP Auto-MDIX control 0 - Auto-MDIX enable 1 - Auto-MDIX disabled (use 27.13 to control channel) Reserved Manual Channel Select 0 - MDI -TX transmits RX receives 1 - MDIX -TX receives RX transmits Write as 0. -
Page 46: Table 5.35 Register 30 - Interrupt Mask
[001]=10Mbps Half-duplex [101]=10Mbps Full-duplex [010]=100Base-TX Half-duplex [110]=100Base-TX Full-duplex Write as 0; ignore on Read 0 = enable data scrambling 1 = disable data scrambling, DATASHEET ® Technology in a Small Footprint Datasheet MODE DEFAULT MODE DEFAULT MODE DEFAULT SMSC LAN8710/LAN8710i... -
Page 47: Interrupt Management
Interrupt Mask Register 30. The Interrupt system on the SMSC The LAN8710 has two modes, a Primary Interrupt mode and an Alternative Interrupt mode. Both systems will assert the nINT pin low when the corresponding mask bit is set, the difference is how they de-assert the output interrupt signal nINT. -
Page 48: Alternate Interrupt System
Rising 6.1 DATASHEET ® Technology in a Small Footprint Datasheet Table 5.38). CONDITION BIT TO CLEAR DE-ASSERT nINT 17.1 low 29.7 1.5 low 29.6 1.4 low 29.5 1.2 high 29.4 5.14 low 29.3 6.4 low 29.2 6.1 low 29.1 SMSC LAN8710/LAN8710i... -
Page 49: Collision Detect
When the 10/100 digital block is in 10Base-T mode, the link status is from the 10Base-T receiver logic. 5.3.5 Power-Down modes There are 2 power-down modes for the LAN8710 described in the following sections. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DATASHEET... -
Page 50: Reset
Software reset, and these are marked “NASR” in the register tables. The SMI registers are not reset by the power-down modes described in For the first 16us after coming out of reset, the MII will run at 2.5 MHz. After that it will switch to 25 MHz if auto-negotiation is enabled. -
Page 51: Figure 5.1 Near-End Loopback Block Diagram
MAC interface are isolated. Far-end system 10/100 Ethernet Digital Ethernet Transceiver Figure 5.2 Far Loopback Block Diagram SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Figure 5.1.The near-end loopback mode is enabled Analog SMSC XFMR... -
Page 52: Configuration Signals
Table 5.39 Pin Names for Address Bits ADDRESS BIT PIN NAME PHYAD[0] RXER/PHYAD0 PHYAD[1] RXCLK/PHYAD1 PHYAD[2] RXD3/PHYAD2 DATASHEET ® Technology in a Small Footprint Datasheet RJ45 Loopback Cable. Created by connecting pin 1 to pin 3 and connecting pin 2 to pin 6. SMSC LAN8710/LAN8710i... -
Page 53: Table 5.40 Mode[2:0] Bus
MII or RMII mode selection is latched on the rising edge of the internal reset (nRESET) based on the strapping of the RXD2/RMIISEL pin. The default mode is MII with the internal pull-down resistor. To select RMII mode, pull the RXD2/RMIISEL pin high with an external resistor to VDDIO. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 5.40 MODE[2:0] Bus... - Page 54 18.14, and the RXD2/RMIISEL pin has no affect. Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Table 5.21, the MII or RMII mode selection is controlled by the register bit DATASHEET ® Technology in a Small Footprint Datasheet SMSC LAN8710/LAN8710i...
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Page 55: Chapter 6 Ac Electrical Characteristics
MDC to MDIO (Read from PHY) delay T1.3 MDIO (Write to PHY) to MDC setup T1.4 MDIO (Write to PHY) to MDC hold SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Valid Data (Read from PHY) Valid Data (Write to PHY) Figure 6.1 SMI Timing Diagram... -
Page 56: Mii 10/100Base-Tx/Rx Timings
Receive signals setup to RXCLK rising T2.2 Receive signals hold from RXCLK rising RXCLK frequency RXCLK Duty-Cycle Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Valid Data DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES SMSC LAN8710/LAN8710i... -
Page 57: Clock Out
Table 6.3 100M MII Transmit Timing Values PARAMETER DESCRIPTION T3.1 Transmit signals required setup to TXCLK rising Transmit signals required hold after TXCLK rising TXCLK frequency TXCLK Duty-Cycle SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Valid Data DATASHEET UNITS NOTES Revision 1.0 (04-15-09) -
Page 58: Mii 10Base-T Tx/Rx Timings
Receive signals setup to RXCLK rising T4.2 Receive signals hold from RXCLK rising RXCLK frequency RXCLK Duty-Cycle Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Valid Data DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES SMSC LAN8710/LAN8710i... -
Page 59: Figure 6.5 10M Mii Transmit Timing Diagrams
Table 6.5 10M MII Transmit Timing Values PARAMETER DESCRIPTION T5.1 Transmit signals required setup to TXCLK rising Transmit signals required hold after TXCLK rising TXCLK frequency TXCLK Duty-Cycle SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Valid Data DATASHEET UNITS NOTES Revision 1.0 (04-15-09) -
Page 60: Rmii 10/100Base-Tx/Rx Timings (50Mhz Ref_Clk In)
Output delay from rising edge of CLKIN to receive signals output valid CLKIN frequency Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Valid Data DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES SMSC LAN8710/LAN8710i... -
Page 61: Figure 6.7 100M Rmii Transmit Timing Diagram (50Mhz Ref_Clk In)
PARAMETER DESCRIPTION T8.1 Transmit signals required setup to rising edge of CLKIN T8.2 Transmit signals required hold after rising edge of CLKIN CLKIN frequency SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Valid Data DATASHEET UNITS NOTES Revision 1.0 (04-15-09) -
Page 62: Rmii 10Base-T Tx/Rx Timings (50Mhz Ref_Clk In)
Output delay from rising edge of CLKIN to receive signals output valid CLKIN frequency Revision 1.0 (04-15-09) MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Valid Data DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES SMSC LAN8710/LAN8710i... -
Page 63: Figure 6.9 10M Rmii Transmit Timing Diagram (50Mhz Ref_Clk In)
PARAMETER DESCRIPTION T10.1 Transmit signals required setup to rising edge of CLKIN T10.2 Transmit signals required hold after rising edge of CLKIN CLKIN frequency SMSC LAN8710/LAN8710i ® Technology in a Small Footprint 10.1 10.2 Valid Data DATASHEET UNITS NOTES Revision 1.0 (04-15-09) -
Page 64: Rmii Clkin Requirements
Figure 6.10 Reset Timing Diagram Table 6.11 Reset Timing Values DATASHEET ® Technology in a Small Footprint Datasheet UNITS NOTES psec p-p – not RMS UNITS NOTES 20 clock cycles for 25 MHz clock 40 clock cycles for 50MHz clock SMSC LAN8710/LAN8710i... -
Page 65: Clock Circuit
The total load capacitance must be equivalent to what the crystal expects to see in the circuit so that the crystal oscillator will operate at 25.000 MHz. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint... -
Page 66: Chapter 7 Dc Electrical Characteristics
® Technology in a Small Footprint Datasheet UNITS COMMENT Table 7.5, “MII Bus Interface Signals,” on page 69 °C/W °C/W Extended commercial temperature components. Industrial temperature components. UNITS COMMENTS Device 3rd party system test 3rd party system test SMSC LAN8710/LAN8710i... -
Page 67: Operating Conditions
ESD strikes while the end equipment is operational. In contrast, the HBM ESD tests are performed at the device level with the device powered down. SMSC contracts with Independent laboratories to test the LAN8710 to IEC61000-4-2 in a working system. Reports are available upon request. Please contact your SMSC representative, and request information on 3rd party ESD test results. -
Page 68: Power Consumption
Technology in a Small Footprint Datasheet Section 5.3.5 for a description VDDIO TOTAL TOTAL POWER CURRENT POWER PIN(MA) (MA) (MW) 53.1 175.2 47.8 157.7 42.6 100.2 Note 7.1 0.98 24.1 79.5 21.2 20.4 Note 7.1 19.5 15.9 Note 7.1 10.9 Note 7.1 SMSC LAN8710/LAN8710i... -
Page 69: Dc Characteristics - Input And Output Buffers
RXDV RXCLK/PHYAD1 COL/CRS_DV/MODE2 0.63 * VDDIO MDIO 0.63 * VDDIO nINT/TXER/TXD4 0.63 * VDDIO SMSC LAN8710/LAN8710i ® Technology in a Small Footprint Table 7.5 MII Bus Interface Signals 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO 0.39 * VDDIO... -
Page 70: Table 7.6 Lan Interface Signals
VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 +8 mA +0.4 VDDIO – +0.4 SMSC LAN8710/LAN8710i... -
Page 71: Table 7.10 Internal Pull-Up / Pull-Down Configurations
Measured at the line side of the transformer, line replaced by 100Ω (± 1%) resistor. Note 7.5 Offset from 16 nS pulse width at 50% of pulse peak Note 7.6 Measured differentially. SMSC LAN8710/LAN8710i ® Technology in a Small Footprint PULL-UP OR PULL-DOWN Pull-up... -
Page 72: Table 7.12 10Base-T Transceiver Characteristics
Technology in a Small Footprint Datasheet Table 7.12 10BASE-T Transceiver Characteristics PARAMETER SYMBOL UNITS NOTES Transmitter Peak Differential Output Voltage Note 7.7 Receiver Differential Squelch Threshold Note 7.7 Min/max voltages guaranteed as measured with 100Ω resistive load. Revision 1.0 (04-15-09) SMSC LAN8710/LAN8710i DATASHEET... -
Page 73: Chapter 8 Application Notes
8.1.1 MII Diagram MDIO nINT TXD[3:0] TXCLK TXER TXEN RXD[3:0] RXCLK RXDV LED[2:1] nRST Interface Figure 8.1 Simplified Application Diagram SMSC LAN8710/LAN8710i ® Technology in a Small Footprint LAN8710 10/100 PHY 32-QFN XTAL1/CLKIN XTAL2 DATASHEET RJ45 25MHz Revision 1.0 (04-15-09) -
Page 74: Twisted-Pair Interface Diagram
49.9 Ohm Resistors Magnetic Supply 2.5 - 3.3V BYPASS Magnetics BYPASS BYPASS Figure 8.4 Copper Interface Diagram DATASHEET ® Technology in a Small Footprint Datasheet Analog Supply 3.3V Power to magnetics interface. BYPASS BYPASS 12.1k RJ45 1000 pF 3 kV SMSC LAN8710/LAN8710i... -
Page 75: Magnetics Selection
MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Datasheet Magnetics Selection For a list of magnetics selected to operate with the SMSC LAN8710, please refer to the Application note “AN 8-13 Suggested Magnetics”. http://www.smsc.com/main/appnotes.html#Ethernet%20Products SMSC LAN8710/LAN8710i ® Technology in a Small Footprint DATASHEET Revision 1.0 (04-15-09) -
Page 76: Chapter 9 Package Outline
Overall Package Height Standoff Mold Thickness Copper Lead-frame Substrate X Overall Size X Mold Cap Size X exposed Pad Size Y Overall Size Y Mold Cap Size Y exposed Pad Size Terminal Length Terminal Pitch Terminal Width Coplanarity SMSC LAN8710/LAN8710i... -
Page 77: Figure 9.1 Qfn, 5X5 Taping Dimensions And Part Orientation
® MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint Datasheet Figure 9.1 QFN, 5x5 Taping Dimensions and Part Orientation SMSC LAN8710/LAN8710i Revision 1.0 (04-15-09) DATASHEET... -
Page 78: Figure 9.2 Reel Dimensions For 12Mm Carrier Tape
® MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint Datasheet Figure 9.2 Reel Dimensions for 12mm Carrier Tape Revision 1.0 (04-15-09) SMSC LAN8710/LAN8710i DATASHEET... -
Page 79: Figure 9.3 Tape Length And Part Quantity
® MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR Technology in a Small Footprint Datasheet Figure 9.3 Tape Length and Part Quantity Note: Standard reel size is 4000 pieces per reel. SMSC LAN8710/LAN8710i Revision 1.0 (04-15-09) DATASHEET...
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