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Signal Name
PR2_MII_MR1_CLK
PR2_MII_MT1_CLK
PR2_MII1_COL
PR2_MII1_CRS
PR2_MII1_RXD0
PR2_MII1_RXD1
PR2_MII1_RXD2
PR2_MII1_RXD3
PR2_MII1_RXDV
PR2_MII1_RXER
PR2_MII1_RXLINK
PR2_MII1_TXD0
PR2_MII1_TXD1
PR2_MII1_TXD2
PR2_MII1_TXD3
PR2_MII1_TXEN
NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to
chapter 5.5 of this document
4.21.2
PRU-ICSS UART
The UART peripheral within the PRU-ICSS is based on the industry standard TL16C550
asynchronous communications element, which is a functional upgrade of the TL16C450. CL-
SOM-AM57x carrier board interface features two instances of the PRU UART interface. For
additional details on PRU-ICSS UART, please refer to the Sitara AM57x technical reference
manual. The table below summarizes the PRUSS_UART interface signals
Table 54
Signal Name
PR1_UART0_CTS_N
PR1_UART0_RTS_N
PR1_UART0_RXD
PR1_UART0_TXD
PR2_UART0_CTS_N
PR2_UART0_RTS_N
PR2_UART0_RXD
PR2_UART0_TXD
NOTE: Pins denoted with "*" are multifunctional. For additional details please refer to
chapter 5.5 of this document
4.21.3
PRU-ICSS Industrial Ethernet Peripheral
CL-SOM-AM57x carrier board interface features one instance of the PRU-ICSS integrated
"industial Ethernet peripheral" (IEP) interface. The IEP performs hardware work required for
industrial Ethernet functions. The IEP module features an industrial Ethernet timer with 16
compare events and a digital I/O port (DIGIO). The industrial Ethernet peripheral supports the
following features:
One master 32-bit count-up counter with an overflow status bit
Eight 32-bit compare registers
8 channel digital data input and 8 channel digital data output
Digital data out enable (optional tri-state control)
Supports direct sampling of data in signals
Data input sampling upon external latch event trough a dedicated latch input signal
Revised April 2018
Pin #
Type
58*
I
49*
I
152*
I
154*
I
179*
I
194*
I
163*
I
202*
I
52*
I
201*
I
197*
I
65*
O
63*
O
69*
O
75*
O
43*
O
PRUSS_UART Interface Signals
Pin #
Type
106*
I
108*
O
110*
I
112*
O
130*
I
134*
O
136*
I
138*
O
CL-SOM-AM57x
Description
MII1 Receive Clock
MII1 Transmit Clock
MII1 Collision Detect
MII1 Carrier Sense
MII1 Receive Data
MII1 Receive Data
MII1 Receive Data
MII1 Receive Data
MII1 Data Valid
MII1 Receive Error
MII1 Receive Link
MII1 Transmit Data
MII1 Transmit Data
MII1 Transmit Data
MII1 Transmit Data
MII1 Transmit Enable
Description
UART Clear-To-Send
UART Ready-To-Send
UART Receive Data
UART Transmit Data
UART Clear-To-Send
UART Ready-To-Send
UART Receive Data
UART Transmit Data
Peripheral Interfaces
Availability
Always
Always
Always
Always
Always
Always
Always
Always
Always
Without "A"
Without "A"
Always
Always
Always
Always
Always
Availability
Always
Always
Always
Always
Always
Always
Always
Always
43
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