Block Diagram - Dsp Section - Sony XDP-4000X Service Manual

Digital equalizer preamplifier
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XDP-4000X
4-3. BLOCK DIAGRAM — DSP SECTION —
CN707
RX
TX
(SERIAL I/O)
BUS INTERFACE
IC701
CN701
SW
12
1
MASTER
8
3
6
2
13
2
5
1
4
10
7
6
9
BUS
4
11
CONTROL
7
8
CN702
CHANGER
Q701
8
3
6
2
5
1
4
7
IC901
U+5V
1
RESET 2
+B (A)
D903
+B
BATT
CHECK
D902
Q901, 902
04
SYSTEM CONTROL
IC702 (2/3)
9
DSPRDY
14
EXT/IO (TX)
12
EXT/IO (RX)
HWR
71
70
RD
Q702
87
BUSON
88
2711-CE
15
UNISI
13
UNISO
17
UNICKI
18-21
A0-15
D0-15
D0-15
23-34
93
LINK OFF
36-43
A0-20
A0-20
A0-20
45-56
100
IC706
BUF
63
SYSRESET
90
FROM CE1
67
EX IN
X701
14.74MHz
66
X IN
FROM-CE2 89
LWR
72
IC706
64
BU IN
84
BU IN
– 17 –
LRCK
BCK
1
DATA A
INPUT
DATA B
SECTION
DATA C
(Page 16)
XRST
IC508
IC510
7
13
A20
2
18
5V
3
TO
17
4
3V
16
IC506
CONV.
A0
5
15
OR
A1
GATE
6
14
IC513
5V
22
&
2
3V
CONV.
D8-15
3-10
14-21
FLASH ROM
IC703
31-34
46 11 43 44
38-41
IC508
31-34
46 11 43 44
38-41
FLASH ROM
IC704
DRAM
IC512
2-5,7-10
18-21
29 30 31 15 16
35-38,40-43
24-28
82,83,85
50,52-54,56-59
100
103
99 72
86,88,89
62-65,67-70
92,93,95
34
LRCK
DSP
SOA
39
IC503
35
BCK
37
SIA
40
SOB
38
SIB
7-10
2 32 3 4 5 18
23
12-15
X502
33.86MHz
F0-7
7-10
2 32 3 4 5 18
23
12-15
34 LRCK
SOA
39
35
BCK
DSP
38
SOB
40
SIB
IC504
37
SIA
50,52-54
82,83,85
56-59,62-65
86,88,89
100
103 99 72
67-70
92,93,95
2-5,7-10
18-24
29 30 31 15 16
35-38,40-43
24-28
DRAM
IC518
– 18 –
IC514
2
18
DATA (HIGH)
3
3V
3
17
DATA (M-H)
TO
OUTPUT
5V
CONV.
SECTION
5
15
DATA (SUB)
(Page 19)
4
16
DATA (M-L)
Signal path
: ANALOG
: DIGITAL

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