Intersil ISL284xxEVAL1Z Series User Manual

®

Introduction

The ISL284xxEVAL1Z evaluation board is a design platform
containing all the circuitry needed to characterize critical
performance parameters of the ISL28470 quad
instrumentation amplifier using a variety of user defined test
circuits.
The ISL284xx are quad operational amplifiers featuring low
noise, low distortion, and rail-to-rail output drive capability.
They are designed to operate with single and dual supplies
from +5VDC (±2.5VDC) down to +2.4VDC (±1.2VDC).

Reference Documents

• ISL28476 Data Sheet, FN6301
• ISL28478 Data Sheet, FN6339
• ISL28486 Data Sheet, FN6312
• ISL28488 Data Sheet, FN6339

Evaluation Board Key Features

The ISL284xxEVAL1Z is designed to enable the IC to
operate from a single supply (+2.4VDC to +5VDC), or from
split supplies (±1.2VDC to ±2/5V). The board is configured
for 4 independent op amps connected for differential input
with a closed loop gain of 10. A single external reference
voltage (VREF) pin and provisions for a user-selectable
voltage divider (filter is included).

Power Supplies

(Figure 1)
External power connections are made through the V
and GND connections on the evaluation board. For single
IN-
IN+
IN(A,B,C,D)+
VCM
VREF
ISL284xxEVAL1Z Evaluation Board User's Guide
Application Note
, V
+
IN(A,B,C,D)-
RIN-
10kΩ
RIN+
10kΩ
VREF
0Ω
GND
FIGURE 2. BASIC AMPLIFIER CONFIGURATION
1
1-888-INTERSIL or 1-888-468-3774
July 23, 2007
supply operation, the V
the power supply negative terminal. For split supplies +V
and V terminals connect to their respective power supply
-
terminals. De-coupling capacitors C
GND through R
are 0Ω but can be changed by the user to provide additional
power supply filtering, or to reduce the voltage rate-of-rise to
less than ±1V/µs. Anti-reverse diodes D
circuit in the case of accidental polarity reversal.
V-
C4
2 1
FIGURE 1. POWER SUPPLY CIRCUIT

Amplifier Configuration

The schematic of each of the 4 op amps with the
components supplied is shown in Figure 2. The circuit
implements a differential input-amp with a closed loop gain
of 10. The circuit can operate from a single 2.4VDC to
+5VDC supply, or from dual supplies from ±1.2VDC to
±2.5VDC. The VREF pin can be connected to ground to
establish a ground referenced input for split supply
operation, or can be externally set to any reference level for
-
single supply operation.
RF
+
100kΩ
VP
IN-
-
V+
V-
IN+
+
VM
RREF(A,B,C,D)+
100kΩ
0Ω
TO OTHER CHANNELS
10kΩ
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
and GND pins are tied together to
-
and C
1 2
and R , 0Ω resistors. Resistors R
1 2
and D
1
R44
C2 R1
2 1
0 0
4.7UF
D2 D1
2 1 2
1
VM
(Figure 2)
1/4 ISL284xx
0Ω
10kΩ
Copyright Intersil Americas Inc. 2007. All Rights Reserved
AN1339.0
, connect to
and R
3 4
protect the
2
V+
C1
2 1
4.7UF
1
C3
2
VP
0.1UF
VOUT(x)