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- Page 1 IP-48ADM16TH High Density 48-channel, 16-bit A/D Converter REFERENCE MANUAL 833-14-000-4000 Version 1.6 August 2008 ALPHI TECHNOLOGY CORPORATION 1898 E. Southern Avenue Tempe, AZ 85282 USA Tel: (480) 838-2428 Fax: (480) 838-4477...
- Page 2 ALPHI TECHNOLOGY does not assume any liability arising out of the application or use of any product or circuit described herein; nor does ALPHI TECHNOLOGY convey any license under its patent rights or the rights of others.
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Page 3: Table Of Contents
# 0 _______________________________________ 20 NTERRUPT ECTOR EGISTER 3.3.21 # 1 _______________________________________ 20 NTERRUPT ECTOR EGISTER RESET ___________________________________________________________ 20 JUMPER DESCRIPTIONS ___________________________________21 CONNECTOR DESCRIPTIONS________________________________________ 22 APPLICATION EXAMPLE____________________________________23 ALPHI TECHNOLOGY CORP. Page iii REV 1.6 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... - Page 4 Correct Address map base address. 3.2.1,3.2.3 Table2.1.3.1, table 3.3 IO Internal clock divisor Rev 1.6: Modified the clock divisor section and added in sampling period calculation (3.3.2). ALPHI TECHNOLOGY CORP. Page iv REV 1.6 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000...
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Page 5: General Description
• Dual threshold level detection for each channel with interrupt possibilities • Analog trigger with any channel and level selection • 32 MHz IP clock ALPHI TECHNOLOGY CORP. Page 1 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 6: Functional Description
Channel List whenever the first channel in the channel list is inside or outside a pre- programmed range. A programmable digital filter selects the minimum number of consecutive values before the interrupt is generated, or the acquisition starts. ALPHI TECHNOLOGY CORP. Page 2 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 7: Theory Of Operation
1-2, 4-6, 9-10 0 -+10v 1-2, 3-5, 8-10 0 -+5v 1-2, 3-5, 9-10 0 -+2.5v 1-2, 5-7, 9-10 Note: J3 is factory use, do not change. ALPHI TECHNOLOGY CORP. Page 3 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 8: Single-Ended Mode
2.1.2 Differential Mode In differential mode channel #0 is associated with channel #24 and so on, until the channel #23 being associated with channel #47. ALPHI TECHNOLOGY CORP. Page 4 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 9: A/D Converter
If using the Threshold A/D converter acquisition can be stopped every timer the signal is back into the defined zone. Bit # need to be set to “1” 5) Program the interrupts as needed ALPHI TECHNOLOGY CORP. Page 5 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 10: Continuous Mode
Setting the DATARAM pointer with a desired address lower than the End address or a number of scan lower than the total scan and enabling an interrupt, the host can “throttle” the read of A/D data. ALPHI TECHNOLOGY CORP. Page 6 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 11: Interface To The Ip Carrier
DATARAM 128k bytes 0x20000-27FFF FLASH memory 4k bytes 0x28000-2807F Channel List RAM 0x28080-280FF Threshold High RAM 0x28100-2817F Threshold Low RAM Table 3.2: Memory Map ALPHI TECHNOLOGY CORP. Page 7 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 12: Address Map Dataram
Allow interrupts in relation with the “Threshold High” value. See Table 2.2.2 for bit selection. Threshold low Allow interrupts in relation with the “Threshold High” value. See Table 2.2.2 for bit selection. ALPHI TECHNOLOGY CORP. Page 8 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... - Page 13 Calibration can be done by switching the two inputs of the differential amplifier to: GND OR +2.5V TO INPUT+ OR -2.5V TO Input, using pre-defined channels: ALPHI TECHNOLOGY CORP. Page 9 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000...
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Page 14: Threshold High Ram
#0, and so on, until the position 47 corresponding to channel #47. The locations 48 to 63 are not used. ALPHI TECHNOLOGY CORP. Page 10 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 15: Iospace
Interrupt Vector Register # 0 0x28 Interrupt Vector Register # 1 0x2A Reset interrupt #0 0x2C Reset interrupt # 1 Table 3.3 IO Registers ALPHI TECHNOLOGY CORP. Page 11 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 16: Internal Clock Divisor (Icdh, Icdl)
Address: IOspace + 0x06 (read) This register contains the position of the DATARAM address currently written to by the State machine. Address: IOspace + 0x06 (write) ALPHI TECHNOLOGY CORP. Page 12 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 17: Scan_Counter Register
The Scan_counter position can be read at address IOspace + 0x0A 3.3.7 Scan_counter status Address: IOspace + 0x0A The Scan_counter position can be read at address IOspace + 0x0A ALPHI TECHNOLOGY CORP. Page 13 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 18: Stop Acquisition Register
Channel List should be executed. Sampling Meaning Clock Source Host Start Acquisition pulse (write) IOspace + 0x12 External event pulse Threshold int. A/D IPStrobe Internal clock Tclk0 ALPHI TECHNOLOGY CORP. Page 14 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 19: Trigger Register
Not used Int_pulse IPstrobe Event_ Event_ Reserved Intrequ1 Intrequ0 polarity threshold_ =”0” All the bits are set to “0” upon Reset. Multiple scan enable ALPHI TECHNOLOGY CORP. Page 15 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... - Page 20 Event Enable output When set to “1”, the input pin corresponding to the channel #47 is used as an external OUTPUT EVENT line for multiple boards. ALPHI TECHNOLOGY CORP. Page 16 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000...
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Page 21: Host Start Acquisition
The higher 4 bits of this 8-bit register select the number of times the channel selected as AD trigger need to be in range before actually starting the acquisition. 3.3.13 Channel Interrupt Register #0 [15~0] Address: IOspace + 0x18 ALPHI TECHNOLOGY CORP. Page 17 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 22: Channel Interrupt Register #1 [31~16]
This signal is “1” when the A/D converter is active. It is “0” after the conversion has finished INTREQ # 0 line This bit shows the state of the interrupt line # 0. ALPHI TECHNOLOGY CORP. Page 18 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 23: Source Interrupt #0 And #1
Address: IOspace + 0x24 This register contains the result of the latest A/D acquisition. 3.3.19 Reset Interrupt Request # 1 Address: IOspace + 0x2C ALPHI TECHNOLOGY CORP. Page 19 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 24: Reset Interrupt Request # 1
This 8-bit Interrupt Vector Register can be programmed by the host. It will be output during an interrupt acknowledge IP INTESELA cycle. RESET All the local registers are cleared when the IP carrier issues a reset. ALPHI TECHNOLOGY CORP. Page 20 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 25: Jumper Descriptions
1-2 sets IN-48 on I/O P2 pin 49 and 2-3 setup Ex-Event on pin 49 Factory Use Factory Use 1-2 3-4 MSEL0 and MSEL1 for programming Cyclone EP1C12Q240. Table 4.1 Jumper Descriptions ALPHI TECHNOLOGY CORP. Page 21 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 26: Connector Descriptions
IN39/IN15- IN16/IN16+ IN40/IN16- IN17/IN17+ IN41/IN17- IN18/IN18+ IN42/IN18- IN19/IN19+ IN43/IN19- IN20/IN20+ IN44/IN20- IN21/IN21+ IN45/IN21- IN22/IN22+ IN46/IN22- IN23/IN23+ IN47/IN23- Table 4.2: IP External I/O Connector (P4) ALPHI TECHNOLOGY CORP. Page 22 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... -
Page 27: Application Example
Same a above but generate a scan-list with at the end channel $3F Post trigger ad48th POST TRIGGER ACQUISITION WITH EVENT SIGNAL Acquisition is made continuously. ALPHI TECHNOLOGY CORP. Page 23 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000... - Page 28 #12 address base + $10 (=1 for negative pulse) Enable Event_ stop_en bit #4 address base + $10 (Event pulse will start Scan_delay_counter) Start acquisition ALPHI TECHNOLOGY CORP. Page 24 REV 1.5 Copyright © 2007, ALPHI Technology Corporation Part Number: 833-14-000-4000...
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