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Force PENT/CPCI-735AR2 Reference Manual

Pent/cpci-735r2/736r2 series
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PENT/CPCI-735R2/736R2 Family
Reference Guide
P/N 221843 Revision AC
January 2004

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  • Page 1 PENT/CPCI-735R2/736R2 Family Reference Guide P/N 221843 Revision AC January 2004...
  • Page 2 Force Computers, GmbH. Force Computers, GmbH assumes no responsibility for the use of any circuitry other than circuitry that is part of a product of Force Computers, GmbH.
  • Page 3 Headquarters The Americas Europe Asia Force Computers Inc. Force Computers GmbH Force Computers Japan K.K. 4211 Starboard Drive Lilienthalstr. 15 Shibadaimon MF Bldg. 4F Fremont CA 94538 D-85579 Neubiberg/München Shiba Daimon 2-1-16 Minato-ku, Tokyo 105-0012 Tel.: +1 (510) 624-5300...

  • Page 5: Table Of Contents

    Contents Using This Guide Other Sources of Information Safety Notes Sicherheitshinweise Introduction Features ............1-3 Variants .
  • Page 6 Installation Action Plan ............2-3 Requirements .
  • Page 7 On-Board Connectors ..........3-9 CompactPCI Connectors .
  • Page 8 Buses Block Diagram ........... . 5-3 PCI Local Bus 0 .
  • Page 9 FPGA 1 ............6-8 SRAM Configuration Register .
  • Page 10 PENT/CPCI-735R2/736R2 Family...
  • Page 11 Tables Introduction Table 1 Standard Compliance..........1-5 Table 2 Ordering Information Excerpt .
  • Page 12 Maps and Registers Table 19 Register Overview ........... 6-3 Table 20 Overview of IPMI Related Register Signals .
  • Page 13 Figures Introduction Figure 1 Function Blocks ........... . . 1-3 Installation Figure 2 Voltage Key .
  • Page 14 Figure 22 PMC Connectors and Slots ......... . 3-14 Figure 23 PN14 Connector Pinout .

  • Page 15: Using This Guide

    Using This Guide This Reference Guide is intended for users qualified in electronics or electri- cal engineering. Users must have a working understanding of Peripheral Component Interconnect (PCI), Compact Peripheral Component Intercon- nect (CPCI), and telecommunications. Style Conventions Notation Description 1234 All numbers are decimal numbers except when used with the nota- tions described below...
  • Page 16 Notation Description No danger encountered. Pay attention to important information Note: marked using this layout. Possibly dangerous situation: slight injuries to people or damage to Caution objects possible Danger Dangerous situation: injuries to people or severe damage to objects possible Product Naming Conventions The following product names are used in this documentation: Product Name Used...
  • Page 17 FPGA Field-Programmable Gate Array Field Replaceable Unit Ground Hot-Swap Controller Integrated Device Electronics ICMB Intelligent Chassis Management Bus IPMB Intelligent Peripheral Management Bus IPMI Intelligent Platform Management Interface Informationstechnische Einrichtung Keyboard Controller Style Light Emitting Diode Linear Feet per Minute Nonmaskable Interrupt Peripheral Component Interconnect Peripheral Management Controller...
  • Page 18 Revision History Order No. Revision Date Description 215764 January 2002 Preliminary Installation Guide 215764 May 2002 Removed “Product Naming Conventions” from Preface, modified “EMC” page xxiii and “EMV” page xxvii, corrected safety note in “Installation in a Powered System” page 2-20, “Hot Swap” page xxv and page xxix, replaces NVRAM by SRAM in Figure 1 “Function Blocks”...
  • Page 19 Order No. Revision Date Description 215764 May 2002 changed name of Figure “IPMI System Interface for Non-Intelligent Devices” to “Communication with Non-Intelligent Devices” in IPMI chapter, corrected Table 25 “SRAM Configuration Register” page 6-9 217572 October 2002 Changed manual type from Installation Guide to Reference Guide, removed IPMI chapter, modified “Other Sources of Information”...
  • Page 20 Revision Date Description 221091 June 2003 Removed order numbers of Force docu- mentation from “Other Sources of Informa- tion” page xxi Modified description of switches SW2-1 and SW2-2 in Table 7 “Default Settings” page 2- 16; added null modem adapter to require- ment list in “Serial Console Redirection”...

  • Page 21: Other Sources Of Information

    Other Sources of Information For further information refer to the following documents and data sheets of the mentioned devices: Company/Org. www. Document Force Computers splus.forcecomput- Sentinel Rev. 1 Reference Guide ) ers.com Only available via S.M.A.R.T. IPMI Reference Guide Only available via S.M.A.R.T.
  • Page 22 1) If you do not have a S.M.A.R.T. account, you can download the PDF file via a Public S.M.A.R.T. Access Account from Force Computers Internet Site (see URL above). To get an account, click on the blue button labeled “log on S.M.A.R.T.” and sign up by entering a form.

  • Page 23: Safety Notes

    The board has been tested in a standard Force Computers system accord- ing to PCI specification and found to comply with the limits for a Class A digital device in this system, pursuant to part 15 of the FCC Rules respec- tively EN 55022 Class A and EN 55024.
  • Page 24 Installation Electrostatic discharge and incorrect board installation and removal can damage circuits or shorten their life. Therefore: • Before touching boards or electronic components, make sure that you are working in an ESD-safe environment. • When plugging the board in or removing it, do not press on the front panel but use the handles.
  • Page 25 Replacement/Expansion Only replace or expand components or system parts with those recom- mended by Force Computers. Otherwise, you are fully responsible for the impact on EMC and the possibly changed functionality of the prod- uct. The total max. power consumption per PMC slot at +/–12V, 5V and 3.3V level must not exceed 7.5W (total overall used voltages).
  • Page 26 Battery If a Lithium battery on the board has to be exchanged, observe the fol- lowing safety notes: • Incorrect exchange of Lithium batteries can result in a hazardous explosion. • Exchange the battery before five years of actual battery use have elapsed.

  • Page 27: Sicherheitshinweise

    Sicherheitsvorschriften und darf ausschließlich für Anwendungen in der Telekommunikationsindustrie und im Zusammenhang mit Industriesteuerungen verwendet werden. Einbau, Wartung und Betrieb dürfen nur von durch Force Computers ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgeführt werden. Die in diesem Handbuch enthaltenen Informationen dienen ausschließlich dazu, das Wissen von...
  • Page 28 Wenn Sie das Board ohne ein PMC-Modul verwenden, schirmen Sie freie Steckplätze mit einer Blende ab, um einen ausreichenden EMV Schutz zu gewährleisten. Wenn Sie Boards in Systeme einbauen, schirmen Sie freie Steckplätze mit einer Blende ab. Installation Elektrostatische Entladung und unsachgemäßer Ein- und Ausbau des Boards kann Schaltkreise beschädigen oder ihre Lebensdauer verkürzen.
  • Page 29 Leuchtet die Hot-Swap-LED nicht, so befindet sich das Board in normalem Betrieb und darf auf keinen Fall entfernt werden. Austausch/Erweiterung Verwenden Sie bei Austausch oder Erweiterung nur von Force Computers empfohlene Komponenten und Systemteile. Andernfalls sind Sie für mögliche Auswirkungen auf EMV und geänderte Funktionalität des Produktes voll verantwortlich.
  • Page 30 RJ-45 Stecker Das CPU Board ist mit RJ-45 Steckern ausgestattet. Dieser Stecker wird sowohl für Telefonanschlüsse als auch für Netzwerkkabel (Twisted Pair Ethernet - TPE) verwendet. Die Verwechslung dieser Anschlüsse kann sowohl das Telefon als auch das Board zerstören. Beachten Sie deshalb folgende Punkte: •...

  • Page 31: Introduction

    Introduction...

  • Page 33: Features

    Introduction Features Features The PENT/CPCI-735R2/736R2 Family is a universal board using Force Computers’ SENTINEL universal bridge technology. As it is based on an Intel Mobile Processor-M of 800 MHz and higher, the PENT/CPCI- 735R2/736R2 Family offers high performance. Combined with full hot- swap capabilities the PENT/CPCI-735R2/736R2 Family is an ideal compo- nent for multi-node processor systems.

  • Page 34: Variants

    Variants Introduction Variants The PENT/CPCI-735R2/736R2 Family comes in three main assembly vari- ants: Name Description CPCI-735R2 PMC slots 1 (64 bit) and 2 (32 bit) accessible, assembly option for hard disk, RTB required for two Ethernet interfaces at CompactPCI con- nector J5 CPCI-735AR2 PMC slot 1 (64 bit) accessible,...

  • Page 35: Standard Compliances

    Table 1: Standard Compliance Standard Description EN 60950 Legal safety requirements UL/cUL 60950 (predefined Force Computers system) EN 61000-6-2 EMC requirements on system level EN55022 EN55024 FCC Part 15 Class A ANSI/IPC-A610 Rev.C Class 2 Manufacturing requirements...

  • Page 36: Ordering Information

    Ordering Information Introduction Ordering Information When ordering the PENT/CPCI-735R2/736R2 Family board variants, upgrades and accessories, use the order numbers given below. Product Nomenclature In the following you find the key for the product name extensions. PENT/CPCI-735R2/736R2 Family/xxxx-ccc-Lyyy-zz xxxx DRAM size in MByte Processor type and clock frequency in MHz Lyyy L2 cache capacity in KByte...
  • Page 37 Introduction Ordering Information Table 2: Ordering Information Excerpt (cont.) Order No. PENT/CPCI-... Description 111335 ...735R2/512-1200-L512-0 Intel Processor-M, 1.2 GHz with 512 MByte main memory, 512 KByte 2nd level cache 111336 ...735AR2/512-1200-L512-0 Intel Processor-M, 1.2 GHz with 512 MByte main memory, 512 KByte 2nd level cache 111337 ...736R2/1G-1200-L512-0 Intel Processor-M, 1.2 GHz with 1 GByte...
  • Page 38 Ordering Information Introduction 1 - 8 PENT/CPCI-735R2/736R2 Family...

  • Page 39: Installation

    Installation...

  • Page 41: Action Plan

    Installation Action Plan Action Plan To install the board, the following steps are necessary and described in detail in the following sections of this chapter. PENT/CPCI-735R2/736R2 Family 2 - 3...
  • Page 42 Action Plan Installation 2 - 4 PENT/CPCI-735R2/736R2 Family...

  • Page 43: Requirements

    • Operating temperatures refer to the temperature of the air circulating around the board and not to the component temperature. • Operating temperatures of the 1.2 GHz board variants are lower than the Force standard temperature requirements. They are limited to 50°C. Caution Do not operate the board outside the specified environmental limits.
  • Page 44 Requirements Installation Table 3: Environmental Requirements Requirement Operating Non-Operating Altitude –300 m to +3,000 m –300 m to +13,000 m Vibration 10 to 15 Hz 2 mm amplitude 5 mm amplitude 15 to 150 Hz Shock 5 g/11 ms halfsine 15 g/11 ms halfsine Free fall 100 mm/3 axis...

  • Page 45: Power Requirements

    For information on the accessories’ power requirements, refer to the docu- mentation coming with the respective accessory or ask your local Force Computers representative. Power Requirements...

  • Page 46: Hardware Upgrades And Accessories

    Hardware Upgrades and Accessories Installation Hardware Upgrades and Accessories The PENT/CPCI-735R2/736R2 Family itself allows an easy and cost-effi- cient way to adapt the board to your application needs. The following table gives an overview on the possible accessories, de- scribed in Table 2 “Ordering Information Excerpt” page 1-6. For the respec- tive board variant, x indicates that the accessory can be used, - indicates that the accessory cannot be used and a number indicates the available PMC slot.

  • Page 47: Pmc Module

    Installation Hardware Upgrades and Accessories PMC Module All three board variants provide PMC slot 1. It supports either a 32- or a 64- bit data bus width with a frequency of either 33 MHz or 66 MHz. PMC Slot 1 provides user I/O signals at connector J3. The CPCI-735R2 and, with limitation, the CPCI-736R2 additionally pro- vides PMC slot 2.

  • Page 48: Installation Procedure

    Hardware Upgrades and Accessories Installation Installation Procedure 1. Remove memory module from PMC slot 1 or remove hard disk from PMC slot 2, if necessary For removal information, refer to the PENT/MEM-735 Installation and to the Guide CPCI-735/HD-AccKit Installation Guide. 2.

  • Page 49: Removal Procedure

    Installation Hardware Upgrades and Accessories 5. Check whether the standoffs of the module cover the mounting holes of the board Figure 4: Position of Mounting Holes 6. Place screws delivered with PMC module into mounting holes 7. Fasten screws Removal Procedure 1.

  • Page 50: Ide Devices

    Hardware Upgrades and Accessories Installation IDE Devices It is possible to have up to two IDE devices on the board which are con- nected to the primary IDE interface: • As assembly option a flash disk can be installed • A hard disk can be connected via on-board connector Figure 5: Flash Disk and IDE Connector Note: Never connect more than two devices to the primary IDE interface.

  • Page 51: Hard-Disk Drive Accessory Kit

    Installation Hardware Upgrades and Accessories Hard-Disk Drive Accessory Kit The Force Computers’ hard-disk accessory kit CPCI-735/HD-AccKit pro- vides a local mass storage device. It can be connected to the primary IDE port via the on-board connector. For installation information, refer to the CPCI-735/HD-AccKit Installation Guide.

  • Page 52: Rear Transition Board

    Hardware Upgrades and Accessories Installation Rear Transition Board As a separate price list item, a rear transition board, the ACC/RTB- 735R2/736R2, is offered. The RTB provides access to the CPU board’s Com- pactPCI user I/O interfaces via industry standard connectors. In addition to the IPMI specification, IPMB1 and ICMB are available at the CPU board’s J5 connector.

  • Page 53: Switch Settings

    The board is delivered with the white switches set to the default position. Caution • If the board is to be used in a Force Computers’ system, check whether the System’s Guide contains information on system-specific switch settings of the board.
  • Page 54 Installation Table 7: Default Settings Switch Number Description BIOS crisis recovery (BIOS update) OFF: Normal operation mode (default) ON: BIOS crisis recovery mode BIOS Flash memory boot block write protection OFF: Write-protected (default) ON: Write enabled Reserved OFF: Default Reserved OFF: Default Reserved OFF: Default...
  • Page 55 Installation Table 7: Default Settings Switch Number Description Front panel reset key OFF: Reset key enabled (default) ON: Reset key disabled RTB reset key OFF: Reset key enabled (default) ON: Reset key disabled IPMI reset OFF: Reset enabled (default) ON: Reset disabled Watchdog OFF: Enabled (but not started) (default) ON: Disabled (cannot be started)

  • Page 56: Board Installation

    Installation Board Installation The board carries Force Computer’s SENTINEL PCI to CPCI Universal Bridge. With this technology the board is capable to run as System Control- ler in the CPCI system slot and as an intelligent I/O board in a peripheral slot.

  • Page 57: Removal Procedure

    Installation Board Installation 3. Plug in board depending on intended function either in system slot marked with a triangle or in peripheral slot marked with a circle 4. Press handles inwards to lock board on CompactPCI rack 5. Fasten board with screws 6.

  • Page 58: Signals

    Board Installation Installation Signals For information on board status concerning the hot-swap conditions, the board provides ENUM# and HEALTHY# signals for hot-swap-controller (HSC) notification and SENTINEL’s Control and Status registers. After installing the board into or before removing it from a powered sys- tem, the interrupt ENUM# signal is generated and passed to the system board of the CompactPCI system to indicate a service request.

  • Page 59: Installation Procedure

    Installation Board Installation 1. Carry out software disconnection From Basic Hot- Swap System 2. Wait until software disconnection process has been completed 3. Open handles 4. Remove board from powered system 1. Press red button to unlock handles From Full Hot-Swap or High-Availability System Figure 7: Button on Handle...
  • Page 60 Board Installation Installation The installation procedure depends upon the system the board is to be in- stalled in. 1. Check board configuration e.g. switch settings, additional mem- Into Basic Hot-Swap System ory modules 2. Check that you are using an appropriate rear transition board, if applicable 3.

  • Page 61: Software Upgrades And Accessories

    Installation Software Upgrades and Accessories Software Upgrades and Accessories The following software upgrades and accessories are offered for the PENT/CPCI-735R2/736R2 Family. BIOS Upgrade From the S.M.A.R.T. server you can download a zip file to create a floppy disk containing a BIOS upgrade file and upgrade utilities. For information on how to upgrade your BIOS, refer to the README file provided on your created BIOS upgrade disk.
  • Page 62 Software Upgrades and Accessories Installation 2 - 24 PENT/CPCI-735R2/736R2 Family...

  • Page 63: Controls, Indicators, And Connectors

    Controls, Indicators, and Connectors...

  • Page 65: Front Panel

    Controls, Indicators, and Connectors Front Panel Front Panel Two front panels are available: • Standard front panel, providing two cutouts for PMC module 1 and 2 • Ethernet front panel, providing: – Cutout for PMC module 1 – Two connectors for Ethernet 1 and 2 –...

  • Page 66: Pmc Cutouts

    Front Panel Controls, Indicators, and Connectors PMC Cutouts The number of PMC cutouts provided depends on the used front panel variant. The standard front panel provides two cutouts for PMC module 1 and 2. The Ethernet front panel provides only one cutout for PMC module 1. Figure 9: Cutouts for PMC Modules on Standard and Ethernet Front Panel 3 - 4...

  • Page 67: Leds

    Controls, Indicators, and Connectors Front Panel LEDs The following LEDs are provided on both front panel variants: Table 8: Description of Front Panel LEDs Description User LED: Indicates POST status (green after POST) User LED: Indicates POST status and IDE activity (green) ETH1 User LED: Indicates link/activity of Ethernet controller 1 (green) ETH2...

  • Page 68: Keys

    Front Panel Controls, Indicators, and Connectors Keys The only front panel key available by both front panel variants is the mechanical reset key. When enabled and toggled, it instantaneously affects the board by generat- ing a main reset. The main reset generates a CompactPCI reset if the board is assembled in a system slot.

  • Page 69: Connectors

    Controls, Indicators, and Connectors Front Panel Connectors Both, the standard and the Ethernet front panel provide the following con- nectors: • COM1 • Keyboard/Mouse Figure 10: Connectors of Standard and Ethernet Front Panel Additionally, the Ethernet front panel provides two RJ-45 connectors for Ethernet 1 and 2 and one USB connector.

  • Page 70: Figure 12 Com1 Connector Pinout

    Front Panel Controls, Indicators, and Connectors If the board is to be incorporated in larger systems and adapted to specific needs, the following connector pinouts may be useful to give information on which signal is assigned to which pin. Figure 12: COM1 Connector Pinout Figure 13: KBD/MS - Keyboard and Mouse Connector Pinout Note: Make sure that the length of keyboard and mouse cables does not exceed three meters.

  • Page 71: On-Board Connectors

    Controls, Indicators and Connectors On-Board Connectors On-Board Connectors The following connectors are on-board: • CompactPCI connectors • IDE Connector • PMC connectors CompactPCI Connectors The board provides the CompactPCI connectors J1, J2, J3, J4 and J5. The CompactPCI interface is clocked with 33 MHz and is 32-bit wide. Figure 16: Location of CompactPCI Connectors (Top View) J1 and J2 The J1 and J2 connectors implement the CompactPCI 64-bit connector...

  • Page 72: Figure 17 J3 Connector Pinout

    On-Board Connectors Controls, Indicators and Connectors Connector J3 provides interfaces to: • Ethernet signals (ETHx, reserved_2.16) for PICMG 2.16 and RTB • PMC1 I/O (PMC1IO_*) • Rear transition board information block (RTB_*) Note: The interface to PICMG 2.16 Ethernet signals is only available on the CPCI-735R2 and the CPCI-736R2.

  • Page 73: Figure 18 J4 Connector Pinout

    Controls, Indicators and Connectors On-Board Connectors Connector J4 provides interfaces to: • Parallel (LPT_*) • PMC 2 I/O (PMC2IO_*) • COM3 (RS232_3_*) Note: The connector J4 is only available on CPCI-735R2 and CPCI- 735AR2. Figure 18: J4 Connector Pinout PENT/CPCI-735R2/736R2 Family 3 - 11...

  • Page 74: Figure 19 J5 Connector Pinout, Rows A-C

    On-Board Connectors Controls, Indicators and Connectors Connector J5 provides interfaces to: • Secondary IDE (IDE_*) • USB (USB_*) • Keyboard (KBD) • PS2 mouse (MS) • COM1 (RS232_1_*) and COM2 (RS232_2_*) • Floppy (FD_*) • IPMB and ICMB Note: Make sure that the length of keyboard, mouse and USB cables does not exceed three meter.

  • Page 75: Ide Connector

    Controls, Indicators and Connectors On-Board Connectors Figure 20: J5 Connector Pinout, Rows D and E IDE Connector A 2.5” hard disk can be connected to the primary IDE interface of the board. The pinout is given below. Figure 21: IDE Connector Pinout PENT/CPCI-735R2/736R2 Family 3 - 13...

  • Page 76: Pmc Connectors

    On-Board Connectors Controls, Indicators and Connectors PMC Connectors At PMC slot 1, the board provides the connectors PN11-PN14 and at PMC slot 2, the board provides the connectors PN21, PN22 and PN24. Figure 22: PMC Connectors and Slots The connectors PN11-13 and PN21-22 implement the pinout as specified by the PMC specification IEEE Standard 1386.1-2001.

  • Page 77: Figure 23 Pn14 Connector Pinout

    Controls, Indicators and Connectors On-Board Connectors Figure 23: PN14 Connector Pinout PENT/CPCI-735R2/736R2 Family 3 - 15...

  • Page 78: Figure 24 Pn24 Connector Pinout

    On-Board Connectors Controls, Indicators and Connectors Figure 24: PN24 Connector Pinout For information on the signaling level and data bus width of the PMC slots, refer to section “PMC Module” page 2-9. 3 - 16 PENT/CPCI-735R2/736R2 Family...

  • Page 79: Bios

    BIOS...

  • Page 81: Introduction

    BIOS Introduction Introduction BIOS (Basic Input Output System) provides an interface between the oper- ating system and the hardware of the board and is used for hardware con- figuration. Before loading the operating system, BIOS performs basic hardware tests and prepares the board for the initial boot-up procedure. BIOS offers the following features: •...

  • Page 82: Changing Configuration Settings

    Changing Configuration Settings BIOS Changing Configuration Settings When the system is turned on or rebooted, the presence and functionality of the system components is tested by POST (Power-On Self Test). Press <F2> while the message Press <F2> to enter SETUP appears on the screen.

  • Page 83: Selecting The Boot Device

    BIOS Selecting The Boot Device Selecting The Boot Device There are two possibilities to determine the device from which BIOS attempts to boot: • Via setup to select a permanent order of boot devices • Via boot selection menu to select any device for the next boot-up proce- dure only Note: BIOS does not support USB, therefore, booting from USB devices is not possible.

  • Page 84: Via Boot Selection Menu

    Selecting The Boot Device BIOS SAMSUNG ATA/CF-(PS) but from the first device listed under “Removable devices”. The same options determine the order in which POST installs the devices and the operating system assigns device letters. BIOS supports up to two floppy devices to which the operating system may assign, e.g.

  • Page 85: Booting The Board Via Network

    BIOS Booting the Board via Network Booting the Board via Network By default, the possibility to boot the board via network is disabled. This is done because the boot process takes significantly more time if network boot is enabled. In order to enable the possibility to boot from network, proceed as follows: 1.

  • Page 86: Serial Console Redirection

    Requirements For serial console redirection, the following is required: • Terminal which supports a VT100 or ANSI mode • Serial interface cable (part of cable accessory kit available from Force Computers) • Null modem adapter Terminal emulation programs such as TeraTermPro can be used.

  • Page 87: Remote Configuration

    BIOS Serial Console Redirection Remote Configuration The procedure to configure the board remotely for boot up depends on the board’s configuration. For boards with standard BIOS the following default settings for remote configuration are used. Table 10: Default Settings for Remote Configuration Parameter Default Setting Console type...
  • Page 88 Serial Console Redirection BIOS 8. Reboot board 9. Configure terminal to communicate using the same parameters as in BIOS setup 10. Connect erial interface cable to COM port you have selected in setup 4 - 10 PENT/CPCI-735R2/736R2 Family...

  • Page 89: Updating Bios

    Via the Software Maintenance And Reference Tools (S.M.A.R.T.) you can get help on configuration, installation, usage and functionality issues of Force Computers’ products. You can download documentation via limited public S.M.A.R.T. access and software via full access after subscribing to a TSA contract.

  • Page 90: Bios Messages

    BIOS Messages BIOS BIOS Messages The following messages may be displayed, e.g. if your system fails after you made changes in the setup menus. If it is not possible to fix a problem with the help of this section, contact your local sales representative or ser- vices for further support.
  • Page 91 BIOS BIOS Messages Message Explanation Corrective Action Fixed disk not working or Check if fixed disk Fixed Disk 0 Failure not configured properly is attached prop- Fixed Disk 1 Failure erly. Run setup to Fixed Disk Controller be sure the fixed- Failure disk type is cor- rectly identified.
  • Page 92 BIOS Messages BIOS Message Explanation Corrective Action Previous POST did not com- Run setup to Previous boot incomplete plete successfully. POST restore original con- - Default configuration loads default values and figuration. This used offers to run setup. If failure error is cleared the was caused by incorrect val- next time the sys-...
  • Page 93 BIOS BIOS Messages Message Explanation Corrective Action System RAM failed at offset Check for correct System RAM Failed at off- nnnn in the 64k block at memory modules. set: nnnn which the error was Otherwise contact detected. your local sales rep- resentative or ser- vices for further support.
  • Page 94 BIOS Messages BIOS 4 - 16 PENT/CPCI-735R2/736R2 Family...

  • Page 95: Buses

    Buses...

  • Page 97: Block Diagram

    Buses Block Diagram Block Diagram The block diagram shows how the CPCI-735R2 devices work together and which data paths they use. The broken line marks optional devices or paths. PENT/CPCI-735R2/736R2 Family 5 - 3...

  • Page 98: Pci Local Bus 0

    LAN #1 Intel 82559ER AD[17] INTB LAN #2 Intel 82559ER AD[18] INTC PMC Slot 2 PMC2 AD[24] INTA (upper) PCI/CPCI- Force Computers AD[20] INTA Bridge SENTINEL Primary PCI CNB30LE North Interface Bridge South Bridge OSB4 Open South AD[31] Bridge Ethernet...

  • Page 99: Pmc2

    PMC modules without PMC I/O con- nector assembled. SENTINEL Force Computers SENTINEL is used as PCI-to-CompactPCI universal bridge that enables the board to work as either CompactPCI system (host) or peripheral board. SENTINEL is capable to run in either 3.3V or 5V VIO environment. Howev- er, hot-swap requirements for the 3.3V environment differ from require-...
  • Page 100 PCI Local Bus 0 Buses Table 13: SENTINEL SPROM Contents (cont.) Register Name Offset Configurable Default Value Comment Downstream BAR FFFFF000 Maps 4 KByte DSR reg- 0 DSR setup isters by default. Larger values provide access to on-board resources. A value less than FFFFF000 is not allowed.
  • Page 101 Buses PCI Local Bus 0 Table 13: SENTINEL SPROM Contents (cont.) Register Name Offset Configurable Default Value Comment Subsystem ID Board-specific sub- preload system ID O setup mask 00000000 Secondary min. grant preload Secondary max. latency preload Primary min. grant preload Primary max.

  • Page 102: Isa Bridge

    PCI Local Bus 0 Buses Table 13: SENTINEL SPROM Contents (cont.) Register Name Offset Configurable Default Value Comment Primary sub class This field defines code “Other Bridge”. Primary base class This field defines code “Bridge Device”. Secondary pro- gramming inter- face Secondary sub This field defines...

  • Page 103: Usb

    Buses PCI Local Bus 0 Device Type I/O Address Space ISA IRQ ISA bridge ..1F7 ..3F7 The secondary IDE interface is routed to CPCI Connector J5 for up to two Secondary IDE additional, external IDE devices which can be connected via RTB. Interface Device Type I/O Address Space...

  • Page 104: Pci Local Bus 1

    PCI Local Bus 1 Buses PCI Local Bus 1 PCI local bus 1 is capable to run at 64 bit and 66 MHz. Table 15: Devices on PCI Local Bus 1 PCI Device Device Type IDSEL Dev. No PCI IRQ REQ/GNT Secondary CNB30LE North...

  • Page 105: Isa Bus

    Buses ISA Bus ISA Bus The local ISA bus is 16-bit wide and is used for connecting flash memory, SRAM, Super I/O, serial ports and user-specific functionality. Flash Memory The firmware memory is built with two 8-bit wide flash chips. One is used as the standard 1 MByte boot flash memory, the other can be used as a 4 MByte user flash memory.

  • Page 106: Sram

    ISA Bus Buses SRAM The board carries an 8-bit wide SRAM with I C backup functionality (SRAM) of up to 32 KByte size (assembly option). The lower 4 KByte of this device are used as the video memory for the BIOS serial redirection feature if no VGA card is installed.

  • Page 107: Super I/O Controller

    Buses ISA Bus Super I/O Controller The National Semiconductor PC97317 Super I/O integrates legacy support features missing in the OSB4 Open South Bridge such as real time clock, serial ports, floppy disk interface, keyboard and mouse controller and a parallel port. Device Type I/O Address Space ISA IRQ...

  • Page 108: Floppy Disk Interface

    ISA Bus Buses Floppy Disk Interface The integrated floppy disk controller is a superset of uDP8473, uPD765A and the N82077. It supports standard 5.25” and 3.5” floppies. The floppy disk interface is routed to the CPCI connector J5. Keyboard and Mouse National Semiconductor PC97317 Super I/O includes a keyboard and mouse controller compliant with 8042H.

  • Page 109: Ipmi Controller

    Buses ISA Bus IPMI Controller The IPMI controller unit consists of a MIPS based micro controller Vitesse VSC215, 512 KByte SRAM and 3 MByte flash memory. It can be accessed via the ISA bus (see Table 22 “I/O Address Ranges” page 6-5). ICMB is connected to the IPMI controller via an RS485 interface.

  • Page 110: Temperature Sensor

    The temperature sensors are connected to the IPMI controller’s I2C bus 3 and can be configured and read via the IPMI controller. The Force IPMI firmware already provides sensor data records (SDRs) containing sensor configuration data such as temperature threshold values. For the board temperature, no threshold is defined.

  • Page 111: Available Ipmi Drivers

    CI-731/735/735R2/736/760/770 Installation Guide and Release Notes and the IPMI Specification V.1.0. Available IPMI Drivers Force Computers provides IPMI drivers to access the IPMI controller for the operating systems VxWorks, Windows 2000 and Linux. These drivers include an application programming interface (API) to use IPMI commands and the KCS interface.

  • Page 112: C Addresses

    Buses C Addresses The following table shows the addresses of devices on the I C buses attached to the IPMI controller. Table 17: I2C Addresses of Devices Attached to IPMI Controller Device C Bus Address BIB (CPU board) BIB (MEM-735) BIB (IPMI controller) Temperature sensor MAX1617 1) if assembled...

  • Page 113: I 2 C Bus

    Buses C Bus C Bus The local I C bus is attached to the southbridge. The I C interface provides access to board information memory devices such as the board information block (BIB) of the board itself and the RTB (assembly option).
  • Page 114 C Bus Buses 5 - 20 PENT/CPCI-735R2/736R2 Family...

  • Page 115: Maps And Registers

    Maps and Registers...

  • Page 117: Overview

    Maps and Registers Overview Overview This section gives an overview on the I/O and memory maps and describes all board-specific registers. Table 19: Register Overview Register Description BIOS Support register Page 6-10 COM 3 IRQ register Page 6-30 Flash Control register Page 6-20 Hardware Configuration register Page 6-13...

  • Page 118: Table 20 Overview Of Ipmi Related Register Signals

    Overview Maps and Registers The table below gives an overview of IPMI related register signals. These signals can be used if you wish to use interrupts (e.g. OBF interrupts) in your own IPMI driver. The interrupt status bits may be useful in IPMI watchdog applications, for example, as trigger to back up data before the board is reset.

  • Page 119: I/O And Memory Maps

    Maps and Registers I/O and Memory Maps I/O and Memory Maps The I/O address ranges of all on-board functional units are shown below. Table 21: I/O Address Ranges Functionality Offset DMA controller 1 0000 ..001F Interrupt controller 0020 ..003F Timer 0040 ..005F Keyboard, mouse...

  • Page 120: Table 22 Memory Address Map

    I/O and Memory Maps Maps and Registers Table 21: I/O Address Ranges (cont.) Functionality Offset Parallel port SPP mode 0278 ..027A 0378 ..037A 03B0 ..03B2 03BC ..03BE GPIO 0C52 IPMI_CS0 0CA2 ..0CA5 IPMI_CS1 0CA6 ..0CA9 IPMI_CS2 0080 GPCS 0F50 ..0F58 1) Default setting The following table shows the address map of direct addressable on-board nonvolatile memory.

  • Page 121: Table 23 Fpga Address Map

    Maps and Registers I/O and Memory Maps Board-specific registers are realized with two FPGAs. All registers are accessible via Index and Data register of the according FPGA. The following table gives information on the I/O address of the Index and Data register of FPGA 1 and FPGA 2.
  • Page 122 FPGA 1 Maps and Registers FPGA 1 The index address and description of all registers realized within FPGA 1 are shown below. Table 24: Index Register FPGA 1 Index No. Register Function Reset/Preset Reserved SRAM Configuration register PCI_RST BIOS Support register POWER_UP_RST LED Control register PCI_RST...

  • Page 123: Fpga 1

    Maps and Registers FPGA 1 SRAM Configuration Register This register enables/disables the lower 4 KByte of the SRAM (at B800 ). It maps the remaining 4 KByte of a 8 KByte SRAM in a 4 KByte segment or the remaining 28 KByte of a 32 KByte SRAM in a 16 KByte and 12 KByte segment to base addresses between C8000 an DC000 Note: If the middle and upper segments of a 32 KByte SRAM are located...

  • Page 124: Bios Support Register

    FPGA 1 Maps and Registers BIOS Support Register The BIOS Support register is used for BIOS related issues and may not be used. Caution Do not write to this register. Writing any values to this register may dam- age the board or cause it to malfunction. Table 26: BIOS Support Register Offset: 02 Signal...

  • Page 125: Led Control Register

    Maps and Registers FPGA 1 LED Control Register The FPGA controls four bicolored (red/green) LEDs. They can be config- ured as user LEDs and/or to show the primary and secondary IDE device access and Ethernet 1 and 2 link and activity. Table 27: LED Control Register Offset: 03 Signal...

  • Page 126: Version Register

    FPGA 1 Maps and Registers Version Register The Version register provides the version of the FPGA software in BCD code. Table 28: Version Register Offset: 08 Signal Description Access 3..0 x [3..0] The most significant four bits specify the first number of the version.

  • Page 127: Hardware Configuration Register

    Maps and Registers FPGA 1 Hardware Configuration Register The Hardware Configuration register provides information about hard- ware assembly or configuration options. Table 29: Hardware Configuration Register Offset: 04 Signal Description Access IPMI_CTRL_ Indicates whether IPMI controller has been PRESENT assembled 0: Not assembled 1: Assembled RTB_PRESENT...

  • Page 128: Fpga 2

    FPGA 2 Maps and Registers FPGA 2 The index address and description of all registers realized within FPGA 2 are shown below. Table 30: Index Register FPGA 2 Index No. Register Function Reset/Preset Reserved Reset Control register Set through bit ‘7’ Reserved Reset Status register POWER_UP_RST...

  • Page 129: Reset Control Register

    Maps and Registers FPGA 2 Reset Control Register The Reset Control register provides the possibility to enable/disable certain reset sources on the board. Table 31: Reset Control Register 1 Offset: 01 Signal Description Access CPCI_RST_MASK Masks CPCI reset signal. 0: CPCI reset enabled (default) 1: CPCI reset disabled PB_RST_MASK Masks CPCI push-button reset (PRST).

  • Page 130: Reset Status Register

    FPGA 2 Maps and Registers Reset Status Register The Reset Status register stores the reset events that occurred since the last power up of the board. The reset events are accumulated and need to be cleared manually. This register will only be reset after power-up reset. Table 32: Reset Status Register Offset: 03 Signal...

  • Page 131: Software Reset Register

    Maps and Registers FPGA 2 Software Reset Register By writing a magic word (55 ) to this register a reset can be performed. Table 33: Software Reset Register Offset: 04 Signal Description Access 7..0 SOFTW_RST : Reset Other than 55 : Normal operation Watchdog Retrigger Register If the watchdog is enabled, a write access with any value to the Watchdog...

  • Page 132: Watchdog Control Register

    FPGA 2 Maps and Registers Watchdog Control Register The watchdog control register controls the functionality of the watchdog. Note: If bit 7 is set to 1 this register is not reset to its default values upon reset. If the watchdog is enabled and is not handled by the boot software the board gets stuck in a permanent watchdog time-out reset cycle.

  • Page 133: Table 36 Watchdog Timer

    Maps and Registers FPGA 2 To implement the watchdog timer the FPGA input clock signal FPGA_CLK14 with a frequency of 14 MHz is used. Table 36: Watchdog Timer DIVx FPGA_CLK Divider Watchdog Timer 37 ms (default) 75 ms 150 ms 300 ms 600 ms 1.2 s...

  • Page 134: Flash Control Register

    FPGA 2 Maps and Registers Flash Control Register The Flash Control register controls the functionality of the Boot Flash and the User Flash device. It determines the addressing range and which device and page is selected. Note: If bit 7 is set to 1 this register is not reset to its default values upon reset.
  • Page 135 Maps and Registers FPGA 2 Table 37: Flash Control Register (cont.) Drives address line FLASH_A22 of the selected flash device. 0: Address line is driven low. 1: Address line is driven high (default). Selects between write protect and write enable mode of flash memory.

  • Page 136: Using 512 Kbyte Bios Address Range

    FPGA 2 Maps and Registers The FPGA allows the mapping of ten pages with a size of 512 KByte or five pages with a size of 1 MByte in the BIOS address range. Table 38: Flash Page Addressing Device Page for 1 MByte Page for 512 KByte Mode (Range 1) Mode (Range 0)

  • Page 137: Version Register

    Maps and Registers FPGA 2 Version Register The Version register provides the version of the FPGA software in BCD code. Table 39: Version Register Offset: 08 Signal Description Access 3..0 x [3..0] The most significant four bits specify the first number of the version.

  • Page 138: Ipmi Irq Register

    FPGA 2 Maps and Registers IPMI IRQ Register In order to write your own IPMI driver in interrupt driven mode, the com- munication with the IPMI controller goes via the interfaces KSC0, KSC1 or KSC2. With the IPMI IRQ 0 register you can chose one of eight interrupts for the KSC0 interface and with the IPMI IRQ 1 register you can chose one of eight interrupts for the KSC1 interface.
  • Page 139 Maps and Registers FPGA 2 Table 40: IPMI IRQ 0 Register Offset: 09 Signal Description Access ISA_IRQ_10 If this bit is set, the IPMI IRQ 0 is routed to ISA IRQ 10. 0: IRQ not assigned (default) 1: IRQ assigned ISA_IRQ_11 If this bit is set, the IPMI IRQ 0 is routed to ISA IRQ 11.

  • Page 140: Ipmi Irq 1

    FPGA 2 Maps and Registers IPMI IRQ 1 The IPMI IRQ1 Register provides the possibility to route IPMI IRQ 1 to sev- eral ISA IRQs or PCI INT A or INT D. Table 41: IPMI IRQ 1 Register Offset: 0A Signal Description Access...

  • Page 141: Ipmi Irq 2

    Maps and Registers FPGA 2 IPMI IRQ 2 The IPMI IRQ 2 Register provides the possibility to route IPMI IRQ 2 to several ISA IRQs or PCI INT A or INT D. Table 42: IPMI IRQ 2 Register Offset: 0B Signal Description Access...

  • Page 142: L_Enum Irq Register

    FPGA 2 Maps and Registers L_ENUM IRQ Register The L_ENUM IRQ register provides the possibility to route SENTINEL’s L_ENUM IRQs to several ISA IRQs or PCI INT A or INT D. Table 43: L_ENUM Interrupt Register Offset: 11 Signal Description Access ISA_IRQ_3 If this bit is set, the L_ENUM is routed to ISA IRQ 3.

  • Page 143: Pmc 1 Irq Register

    Maps and Registers FPGA 2 PMC 1 IRQ Register The PMC 1 IRQ register provides the possibility to route the IRQ of PMC slot 1 to several ISA IRQs or PCI INT A or INT D. Table 44: PMC 1 IRQ Register Offset: 12 Signal Description...

  • Page 144: Com 3 Irq Register

    FPGA 2 Maps and Registers COM 3 IRQ Register The COM 3 IRQ register provides the possibility to route the IRQ of the serial interface COM 3 to several ISA IRQs or PCI INT A or INT D. Table 45: COM 3 IRQ Register Offset: 13 Signal Description...

  • Page 145: Interrupt Status Register

    Maps and Registers FPGA 2 Interrupt Status Register The Interrupt Status register indicates whether one of the following inter- rupts has occurred even if it is not routed to an external interrupt: • IPMI IRQ 0 • IPMI IRQ 1 •...
  • Page 146 FPGA 2 Maps and Registers 6 - 32 PENT/CPCI-735R2/736R2 Family...

  • Page 147: Battery Exchange

    Battery Exchange...

  • Page 149: Figure 30 Battery Location

    Force Computers therefore assumes that there usually is no need to exchange the Lithium battery except for example in the case of long-term spare part handling.
  • Page 150 Battery Exchange A - 4 PENT/CPCI-735R2/736R2 Family...

  • Page 151: Troubleshooting

    Troubleshooting...
  • Page 153 Troubleshooting Error List A typical CompactPCI system is highly sophisticated. This chapter can be taken as a hint list for detecting erroneous system configurations and strange behaviors. It cannot replace a serious and sophisticated pre- and post sales support during application development. If it is not possible to fix a problem with the help of this chapter, contact your local sales representa- tive or services for further support.
  • Page 154 Troubleshooting Problem Possible Reason Solution During Boot-up Procedure Board does not boot Boot device is not partitioned according Check partition according to operating to used operating system system’s needs. Boot sequence not correct Correct boot sequence Interrupts are not set correctly Set interrupts correctly Wrong configuration of boot devices Configure boot devices correctly...
  • Page 155 Troubleshooting Problem Possible Reason Solution Drivers are missing, faulty or do not 1. Check that all used hardware match hardware parts have a driver matching the hardware 2. Reinstall hardware drivers Board defect Replace board Low system performance Caches are disabled Enable caches Memory/PMC module does Module defect...
  • Page 156 Troubleshooting B - 6 PENT/CPCI-735R2/736R2 Family...

  • Page 157: Index

    Index CPCI-735AR2 ........2-8, 3-3 CPCI-735R2 ........2-8, 2-9, 3-3 ......... 2-8, 3-3 CPCI-736R2 ........ 1-3, 1-4, 3-3, 3-7 Ethernet Flash disk ..........2-12 Hot swap ........1-3, 2-18, 2-19 I/O board ..........2-18 .......... 2-18 Peripheral slot ............ 4-4, 4-6 POST S.M.A.R.T.
  • Page 158 I - 2 PENT/CPCI-735R2/736R2 Family...

  • Page 159: Product Error Report

    Affected Documentation: Hardware Software Systems Hardware Software Systems Error Description: This Area to Be Completed by Force Computers: Date: PR#: Responsible Dept.: Marketing Production Engineering Board Systems Send this report to the nearest Force Computers headquarter listed on the address page.

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