200 Mhz Frequency Generation System; Overview; Figure 3-7. 200 Mhz Frequency Generation System Block Diagram - Motorola HT1250-LS+ Service Manual

3-8
The IFIC is a low-voltage monolithic FM IF system incorporating a mixer/oscillator, two limiting IF
amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI), voltage
regulator and audio and RSSI op amps. The second LO frequency is determined by Y3200.
Additional IF selectivity is provided by two ceramic filters, FL3204 (between the second mixer and IF
amp) and FL3206 (between the IF amp and the limiter input). FL3204 is a 4 element filter with a BW6
= 12 kHz. FL3206 is a 6 element filter with a BW6 = 9 kHz. These bandwidths are optimum for 12.5
kHz channel spacing systems. Ceramic resonator Y3102 provides phase vs. frequency characteristic
required by the quadrature detector, with 90 degree phase shift occurring at 455 kHz. Buffer Q3211
provides a lower driving impedance from the limiter to the resonator, improving the IF waveform and
lowering distortion.
3.7

200 MHz Frequency Generation System

3.7.1

Overview

The frequency generation system, shown in Figure 3-7, is composed of two circuit blocks, the
Fractional-N synthesizer IC U3701, the VCO/Buffer IC U3801, and associated circuitry. Figure 2-8
shows the peripheral interconnect and support circuitry used in the synthesizer block, and Figure 2-9
details the internal circuitry of the VCOBIC and its interconnections to the surrounding components.
Refer to the schematic to identify reference designators.
The Fractional-N synthesizer is powered by regulated 5V and 3.3V provided by U3711 and U3201
respectively. 5V is applied to U3701 pins 13 and 30, and 3.3V is applied to pins 5, 20, 34 and 36. The
synthesizer in turn generates a super-filtered 4.5V supply (VSF, from pin 28) to power U3801. In
addition to the VCO, the synthesizer also interfaces with the logic and ASFIC circuits. Programming
for the synthesizer is accomplished through the microprocessor data, clock, and chip select lines
(U409 pins 100, 1 and 2 respectively). A logic high (3.3V) from U3701 pin 4 indicates to the
microprocessor that the synthesizer is locked.
Voltage
Multiplier
Vmult1
Synthesizer
Vmult2
U3701
16.8 MHz
Ref. Osc.
Modulating
Signal

Figure 3-7. 200 MHz Frequency Generation System Block Diagram

Transmit modulation from the ASFICcmp is applied to U3701 pin 10. An electronic attenuator in the
ASFICcmp adjusts overall transmitter deviation by varying the audio level applied to the synthesizer
IC. Internally the audio is digitized by the Fractional-N and applied to the loop divider to provide the
low-port modulation. The audio is also routed through an internal attenuator for modulation balancing
purposes and is available at U3701 pin 41 (VCO_MOD). This audio signal is routed to the VCO's
modulator.
VCP
Aux3
Loop
Filter
MOD Out
TRB
Rx Out
Rx VCO
VCOBIC
Circuit
U3801
Tx VCO
Circuit
Theory of Operation
Buffer
Q3802
To Mixer
Tx Out
To PA Driver