Mitsubishi SL2U Service Manual page 79

Lc40 chassis, lc38 chassis
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PCB-MAIN(5/8)
PCB-MAIN(6/8)
IC8A1,IC8M1 L3E06090D0A
2~11
DB[0~9]
48
CLK
46
STSQ
Control Logic
47
XFR
and
DAC Latches
15
INV
13
E/O
14
R/L
40
VREF
SCALING
39
CONTROL
VMID
20
STBY
BIAS
21
BYP
PCB-MAIN(7/8)
IC7A2 HD74LV14T
HSCTL
1
H SYNC DET.
C / HSYNC IN
2
3
VIDEO IN
SYNC SEPA.
VSEPA
4
V SYNC SEPA.
VSYNC IN
5
CVPOL
6
V SYNC DET.
CVEXI
7
CPSEL
8
CLAMP PULSE GEN.
GND
9
36
VID1
AMP
DAC
34
VID2
DAC
AMP
32
VID3
AMP
DAC
30
VID4
AMP
DAC
28
VID5
AMP
DAC
26
VID6
DAC
AMP
43
38
V1
V2
HOR. SYNC
CONTROL
IC8A2,IC8M2 L3E01040F0A
3
DYIN
4
CLYIN
5
DIRYIN
15
DIRXIN
14
NRGIN
47
MODE
44
CMODE
46
CLK
45
RST
7
DXIN
6
CLXIN
11
ENBX1IN
10
ENBX2IN
9
ENBX3IN
8
ENBX4IN
16
NRSW1
17
NRSW2
48
TEST
(VCC System)
POLH
18
EXIH
17
POLV
16
EXIV
15
Vcc
14
TTL/CMOS
INPUT
HDRV
13
12
CLAMP
TTL/CMOS
OUTPUT
VDRV
11
CPWID
10
B-4
VCC GND
VDD
DGND
1,13
2,12
24,25,36,42
INVERT LEVEL SHIFT
LEVEL SHIFT
INVERT LEVEL SHIFT
LEVEL SHIFT
LEVEL SHIFT
INVERT LEVEL SHIFT
REFERENCE
PHASE COMPARISON
CLOCK
CIRCUIT
DELAY CIRCUIT
INVERT LEVEL SHIFT
DELAY CIRCUIT
LEVEL SHIFT
INVERT LEVEL SHIFT
DELAY CIRCUIT
INVERT LEVEL SHIFT
DELAY CIRCUIT
INVERT LEVEL SHIFT
DELAY CIRCUIT
INVERT LEVEL SHIFT
DELAY CIRCUIT
INVERT LEVEL SHIFT
DECODER
18
19
20
NRSA
NRSC
NRSB
NRSD
IC7H2 SP232ECN
Vcc
16
1
C1+
+5V to +10V
2
3
Voltage Doubler
C1-
4
C2+
6
+10V to -10V
5
Voltage Inverter
C2-
400k
11
14
T1 IN
T1
400k
10
7
T2 IN
T2
12
13
R1 OUT
R1
5k
9
8
R2 OUT
R2
5k
15
GND
The negative terminal of the V+ storage capacitor can be tied
to either Vcc or GND. Connecting the capacitor to Vcc (+5V)
is recommended.
23,37,43
41
DY
39
CLY
40
CLY
26
DIRY
27
DIRX
35
NRG
45
ENBY2
38
MONITOR
32
DX
33
CLX
34
CLX
28
ENBX1
29
ENBX2
30
ENBX3
31
ENBX4
SW
SW
22
NRS
SW
SW
21
(VDD System)
V+
V-
T1 OUT
RS-232
OUTPUT
T2 OUT
R1 IN
RS-232
INPUT
R2 IN

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