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5
U1-12
U1-12
BCM7038B0
BCM7038B0
Clocks
Clocks
H7
BYP_SYS_CLK
G20
BYP_RFM_PLL
H8
BYP_CPU_CLK
USB_MON_PLL
USB_MON_CDR
SATA_FS_TEST
SATA_PLL_TEST
D
R122
R122
0
0
TP16
TP16
AD23
EXT_DDR_CLK
3OT_XTAL_P
H29
3RD_OT_XTAL_P
3RD_OT_XTAL_N
C147
C147
15pF
15pF
R123
R123
L11
L11
22
22
2.7uH
2.7uH
R125
R125
301
301
Y1
Y1
54.000MHz 3OT
54.000MHz 3OT
C149
C149
8.2pF
8.2pF
A
Stitch GND around XTAL and caps
C
inside GND layer cutout
U1-10
U1-10
BCM7038B0
BCM7038B0
Control
Control
B25
MPOD_SCLK/SPI_M_SCK/GPIO_36
C26
MPOD_SDI/SPI_M_MOSI/GPIO_37
D26
SPI_S_MISO/MPOD_SDO/SPI_M_MISO/GPIO_38
E24
SPI_S_SS0/MPOD_SCTL/SPI_M_SS0/GPIO_39
B26
HD_DVI0-8/EXT_LONG_RST/SPI_M_SS1/GPIO_40
B
D29
BSC_M0_SCL/SGPIO_02
D27
BSC_M0_SDA/SGPIO_03
D28
BSC_M1_SCL/SGPIO_04
C29
BSC_M1_SDA/SGPIO_05
E26
BSC_M2_SCL/SGPIO_06
E27
BSC_M2_SDA/SGPIO_07
UART_0_TXD
UART_0_RXD
A
5
4
G7
OBSRV_PLL
G15
G14
9
G6
F6
F7
CLK27_OUT
R121
R121
33
33
C146
C146
12pF
12pF
H28
3OT_XTAL_N
Match 3OT_Xtal_N and 3OT_Xtal_P
C148
C148
15pF
15pF
R124
R124
22
22
R126
R126
301
301
U1-7
U1-7
BCM7038B0
BCM7038B0
UARTs
UARTs
HD_DVI0-4/UART0_RXD/GPIO_32
HD_DVI0-5/UART0_TXD/GPIO_33
HD_DVI0-6/UART1_RXD/GPIO_34
C150
C150
HD_DVI0-7/UART1_TXD/GPIO_35
8.2pF
8.2pF
Infrared
Infrared
R27
IR1_IN
B28
IR_INT/PWM_0/GPIO_05
C28
HD_DVI1_DE/IR2_IN/PWM_1/GPIO_06
D3.3V
GPIO_37
GPIO_38
U26
U26
R330
R330
33
33
11
14
T1IN
T1OUT
10
7
T2IN
T2OUT
R331
R331
12
13
R1OUT
R1IN
9
8
R2OUT
R2IN
33
33
D5V
1
C+
16
3
VCC
C1-
4
C2+
5
C2-
C352
C352
15
2
GND
V+
6
V-
0.1uF
0.1uF
SP232
SP232
4
3
Front Panel Interface
5VSTBY
STBY
UART_1_TXD
UART_1_RXD
PWON_MUTE
FP_RESET_N
RN81
RN81
D20
UART_0_RXD
E20
1
8
UART_0_TXD
2
7
UART_1_RXD
D19
3
6
A20
4
5
UART_1_TXD
10
10
R28
IR_OUT
D3.3V
R328
R328
R329
R329
4.7K
4.7K
4.7K
4.7K
R138
R138
NI 33
NI 33
R139
R139
NI 33
NI 33
RN84
RN84
1
8
2
7
3
6
4
5
33
33
By RS-232 pin define,use
Pin to Pin modem cable
connection
R450
R450
33
33
R451
R451
33
33
C347 0.1uF
C347 0.1uF
C348 0.1uF
C348 0.1uF
D5V
ESD2
ESD2
ESD4
ESD4
C349 0.1uF
C349 0.1uF
C355
C355
0.1uF
0.1uF
Place these diode as close as possible to J23
3
2
J22
J22
1
2
3
4
5
6
7
8
WAFER 1x8 PH2.0
WAFER 1x8 PH2.0
LPF to minimize
noise to tuner
DVI_CTRL_CLK
6,7
For HDMI
DVI_CTRL_DATA
6,7
M1_SCL
9
For AD7181, Clone board
M1_SDA
9
M2_SCL
11,19
For FE, EEPROM
M2_SDA
11,19
J23
J23
1
6
TXD
2
CTS
7
RXD
3
RTS
8
4
9
5
SERIAL1 DB9-Female
SERIAL1 DB9-Female
ZINWELL CORPORATION [ Hsinchu ] R&D II
ZINWELL CORPORATION [ Hsinchu ] R&D II
ZINWELL CORPORATION [ Hsinchu ] R&D II
2, Wen-Hua Road, Hsinchu Industrial Park,Hsinchu 303, Taiwan
2, Wen-Hua Road, Hsinchu Industrial Park,Hsinchu 303, Taiwan
2, Wen-Hua Road, Hsinchu Industrial Park,Hsinchu 303, Taiwan
TEL:886-3-597-9050 # 559
TEL:886-3-597-9050 # 559
TEL:886-3-597-9050 # 559
Title
Title
Title
Size
Size
Size
C
C
C
Date:
Date:
Date:
2
1
PWON_MUTE 17
GPIO37 is FE_RESET_N_0
GPIO_37
19
GPIO38 is FE_RESET_N_1
GPIO_38
19
STBY
13
D
C
B
10
A
Philips_DVR
Philips_DVR
Philips_DVR
Document Number
Document Number
Document Number
Rev
Rev
Rev
BSC,PKT,CLKS
BSC,PKT,CLKS
BSC,PKT,CLKS
1.1
1.1
1.1
Wednesday, January 24, 2007
Wednesday, January 24, 2007
Wednesday, January 24, 2007
Sheet
Sheet
Sheet
10
10
10
of
of
of
19
19
19
1
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