Marantz CR710/F1W Service Manual page 14

IC62 : TC9462F (DIGITAL SIGNAL PROCESSOR)
BLOCK DIAGRAM
80 79
DVSR
81
RO 82
DVDD
83
DVR 84
LO
85
DVSL 86
TEST1
87
TEST2 88
TEST3
89
BUS0 90
BUS1
91
BUS2 92
BUS3
93
VDD
94
VSS
95
96
BUCK
CCE
97
TEST4 98
TSMOD 99
RST 100
1 2
PIN FUNCTION
PIN No. NAME I/ O FUNCTIONAL DESCRIPTION
Test mode terminal. Normally, keep at open.
1 TEST0 -
Playback speed mode flag output terminal.
2 HSO O
UHSO
H
H
UHSO
L
3 O
L
Subcode Q data emphasis flag output terminal.
Emphasis ON at "H" level and OFF at "L" level.
4 EMPH O
The output polarity can invert by command.
Channel clock output terminal. (44.1 kHz)
5 LRCK O L-ch at "L" level and R-ch at "H" level.
The output polarity can invert by command.
Digital GND terminal.
6 V -
SS
Bit clock output terminal. (1.4112 MHz)
7 BCK O
Audio data output terminal.
8 AOUT O
Digital data output terminal.
9 DOUT O
Buffer memory over signal output terminal.
10 MBOV O
Over at "H" level.
Correction flag output terminal.
11 IPF O At "H " level, AOUT output is made to correction
impossibility by C
Subcode Q data CRCC check adjusting result output
12 SBOK O
terminal. The adjusting result is OK at "H" level.
Subcode P~W data readout clock input/output
13 CLCK I/O
terminal. This terminal can select by command bit.
Digital power supply voltage terminal.
14 V -
DD
Digital GND terminal.
15 V -
SS
Subcode P~W data output terminal.
16 DATA O
Playback frame sync signal output terminal.
17 SFSY O
Subcode block sync signal output terminal.
18 SBSY O
Processor status signal readout clock output terminal.
19 SPCK O
Processor status signal output terminal.
20 SPDA O
Correction frame clock output terminal. (7.35 kHz)
21 COFS O
Internal signal (DSP internal flag and PLL clock) output
22 MONIT O
terminal. Selected by command.
Digital power supply voltage terminal.
23 V -
DD
Test input/output terminal. Normally, keep at "L" level.
TESIO0
24 I
PLL double reference voltage supply terminal.
25 P2V -
REF
2/4 times speed at "VREF" voltage.
26 HSSW O
1 bit DA converter zero detect flag output terminal.
27 ZDET O
Phase difference signal output terminal of EFM signal
28 PDO O
and PLCK signal.
TMAX detection result output terminal. Selected by
29 TMAXS O
command bit (TMPS).
TMAX detection result output terminal. Selected by
command bit (TMPS).
30 TMAX O
DIFFERENCE RESULT
Longer than fixed ferq.
Shorter than fixed freq.
Within the fixed freq.
78 77 76 75 74 73 72 71 70
Address
Digital out
3 4 5 6 7 8 9 10 11
REMARKS
With pull-up resistor.
HSO PLAYBACK SPEED
H Normal
L 2 times
H 4 times
-
L
correction processing.
2
2-state output (PV
3-state output
(P2V ,PV
REF REF,
3-state output
TMAX OUTPUT
(P2V ,HiZ V
REF ,
"P2V "
REF
"V "
SS
"HiZ"
69 68 67 66 65 64 63 62 61
Servo
control
ROM
Digital equalizer
circuit
Automatic adjustment
RAM
circuit
CLV servo
Synchronous
guarantee
EFM decode
Sub code Status
decoder
12 13 14 15 16 17 18 19 20
PIN No. NAME I/ O
31 LPFN I
32 LPFO O
33 PV -
REF
-
34 VCOREF I
35 VCOF O
AV
36 -
SS
37 SLCO O
-
38 RFI I
39 AV -
DD
40 RFCT I
-
41 RFZI I
42 RFRP I
-
43 FEI I
-
44 SBAD I
-
45 TSIN I
-
46 TEI I
-
47 TEZI I
-
48 FOO O
TRO
49 O
50 V -
- REF
51 RFGC O
- 52 TEBC O
53 TEBC O
-
- 54 TEBC O
-
55 DMO O
-
-
56 2V -
REF
-
- 57 SEL O
-
-
58 FLGA O
-
-
59 FLGB O
-
,HiZ)
REF
60 FLGC O
-
V )
SS
61 FLGD O
-
62 V -
DD
63 V -
SS
64 IO0
)
SS
65 IO1
I/O
66 IO2
67 IO3
18
60 59 58 57 56 55 54 53 52
PWM D / A
VCO
21 22 23 24 25 26 27 28 29
FUNCTIONAL DESCRIPTION
LPF amplifier inverting input terminal for PLL.
LPF amplifier output terminal for PLL.
PLL reference voltage supply terminal.
VCO center frequency reference level terminal.
Normally, keep at "PV " level.
REF
VCO filter terminal.
Analog GND terminal.
Data slice level output terminal.
RF signal input terminal.
Analog power supply voltage terminal.
RFRP signal center level input terminal.
RFRP zero cross input terminal.
RF ripple signal input terminal.
Focus error signal input terminal.
Sub-beam adder signal input terminal.
Test input terminal. Normally, keep at "V " level.
REF
Tracking error signal input terminal.
Track in at tracking servo on.
Trcaking error zero cross input terminal.
Focus servo equalizer output terminal.
Tracking servo equalizer output terminal.
Analog reference voltage supply terminal.
RF amplitude adjustment control signal output terminal.
Tracking balance control signal output terminal.
Feed equalizer output terminal.
Speed error signal or feed search equalizer output
terminal.
Disk equalizer output terminal. (PWM carrier = 88.2 kHz
for DSP, Synchronize to PXO)
Analog double reference voltage supply terminal.
APC circuit ON/OFF indication signal output terminal.
At the laser on time, UHF = L at "HiZ" level and
UHF = H at "H" level.
Extemal flag output terminal for internal signal.
Can select signal from TEZC, FOON, FOK and RFZC by
command.
Extemal flag output terminal for internal signal.
Can select signal from DECT, FOON, FMON and RFZC
by command.
Extemal flag output terminal for internal signal.
Can select signal from TRON, TRSR, FOK and SRCH by
command.
Extemal flag output terminal for internal signal.
Can select signal from TRON, DMON, HYS and SHC by
command.
Digital power supply voltage terminal.
Digital GND terminal.
General I/O terminal. Can change over input port or
output port by command. At the input mode time can
readout a state of terminal (H/L) by read command. At
the output mode time can control a state of terminal
(H/L/HiZ) by command.
51
VREF
50
49 TRO
FOO
48
47 TEZI
46 TEI
45 TSIN
SBAD
44
43 EF1
RFRP
42
41 RFZI
RFCT
40
AVDD
39
RF1
38
SLCO
37
AVSS
36
35 VCOF
VCOREF
34
33 PVREF
32 LPFO
31 LPFN
30
REMARKS
Analog input.
Analog output.
-
-
Analog output.
-
Analog output.
Analog input (Zin : selected by command)
-
Analog input (Zin : 50k )
Analog input.
Analog input.
Analog input.
Analog input.
Analog input.
Analog input.
Analog input (Zin : 10k )
Analog output (2V ~AV )
REF SS
-
3-state PWM signal output.
(2V , V , V )
REF REF SS
(PWM carrier = 88.2 kHz)
3-state PWM signal
output.(2VREF, VREF, VSS)
-
-
-
-
-
-
-
-
-