Related Manuals for Supero SUPER P6DBS
Summary of Contents for Supero SUPER P6DBS
- Page 1 ® UPER SUPER P6DBS SUPER P6DBE SUPER P6DBU SUPER P6SBU SUPER P6SBS SUPER P6SBA SUPER P6SBM USER’S AND BIOS MANUAL Revision 2.5...
- Page 2 The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this Please Note: For the manual, or to notify any person or organization of the updates.
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Page 3: Manual Organization
About This Manual This manual is written for system houses, PC technicians and knowledgeable PC end users. It provides information for the installation and use of the SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM motherboard. The SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/ P6SBM supports Pentium II 400/350/333/300/266/233 MHz processors. - Page 4 User’s Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Chapter 5 has information on running setup and includes default settings for Standard Setup, Advanced Setup, Chipset function, Power Management, PCI/ PnP Setup and Peripheral Setup. Appendix A offers information on BIOS error beep codes and messages.
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Page 5: Table Of Contents
Front Control Panel Connector .................. ix Chapter 1: Introduction Overview ......................1-1 SUPER P6DBS Image ................1-4 SUPER P6DBS Motherboard Layout ............ 1-5 SUPER P6DBE Image ................1-6 SUPER P6DBE Motherboard Layout ............ 1-7 SUPER P6DBU Image ................1-8 SUPER P6DBU Motherboard Layout ............ 1-9 SUPER P6SBU Image ................ - Page 6 User’s Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Unpacking ....................2-1 Pentium II Processor Installation ..............2-1 OEM Pentium II and Heat Sink Support ..........2-4 Removing the Pentium II Processor ............. 2-4 Installation of the Universal Retention Mechanism ........2-5 Special Instructions for the Celeron Processor ......... 2-5 Explanation and Diagram of Jumper/Connector ........
- Page 7 Table of Contents Before Power On ..................3-1 Troubleshooting Flowchart ..............3-1 No Power ....................3-2 No Video ....................3-2 Memory Errors ..................3-2 Losing the System’s Setup Configuration ..........3-3 Technical Support Procedures ..............3-3 Frequently Asked Questions ................. 3-4 Returning Merchandise for Service .............
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Page 8: Jumper Quick Reference
User’s Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Jumper Quick Reference P 6 D B S / P 6 D B E / P 6 S B S / P 6 S B A / P 6 S B M * P 6 D B U / P 6 S B U... -
Page 9: Front Control Panel Connector
User’s Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Front Control Panel Connector JF2 JF1 H a r d Hard Drive Drive L E D L E D IR Con P o w e r P o w e r L E D L E D... -
Page 10: Chapter 1: Introduction
While all of the motherboards are ATX form factor, the P6DBU and P6DBE have 5 PCI and 2 ISA with one shared slot. The SUPER P6DBS, P6SBU, P6SBS and P6SBA have 4 PCI and 3 ISA with one shared slot, and the SUPER P6SBM has 3 PCI and 1 ISA with one shared slot. - Page 11 2 USB ports. The SUPER P6DBU and P6SBU provide on-board Adaptec 7890 Ultra II SCSI controller with data transfer rate of up to 80 MB/s, and optional RAIDport III (ARO-1130xA-2)**. The SUPER P6DBS and P6SBS have an inte- grated on-board Adaptec 7895 MultiChannel UW SCSI controller. The dual chan- nels allow a data transfer rate of 40 MB/s per channel.
- Page 12 Chapter 1: Introduction Notes...
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Page 13: Super P6Dbs Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6DBS Figure 1-1. SUPER P6DBS Motherboard Image... -
Page 14: Super P6Dbs Motherboard Layout
2-3 66 MHz OFF 100 MHz ——–—–———————————————— J P 2 0 : 1-2 PIIX CTL PD State 2-3 BIOS CTL PD State (default) WOL: Wake-on-LAN ——–———————–——–—–——–——–— *Note: To Enable Overheat Buzzer place a jumper on BZ_On. Figure 1-2. SUPER P6DBS Motherboard Layout... -
Page 15: Super P6Dbe Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6DBE Figure 1-3. SUPER P6DBE Motherboard Image... -
Page 16: Super P6Dbe Motherboard Layout
Chapter 1: Introduction 9.6" PS/2 KB PS/2 MOUSE PWR_SEC Overheat LED JOH1 BZ_ON Parallel Port JP16 12" 12" JP11 JP20 PCI 5 JBT2: Ext Battery PCI 4 Chassis Intrusion PCI 3 PIIX4E PCI 2 JP18 PCI 1 SBLINK BIOS IDE LED/KEYLOCK/SPEAKER IR CON PW_ON RESET 9.6"... -
Page 17: Super P6Dbu Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6DBU Figure 1-5. SUPER P6DBU Motherboard Image... -
Page 18: Super P6Dbu Motherboard Layout
Chapter 1: Introduction 9.65" PWR_SEC PS/2 KB PS/2 MOUSE J17, J18 BZ_ON Overheat LED Parallel Port FLOPPY JP11 JP20 JBT2: Ext Battery JA5, JA6: SCSI Termination PCI 4 PCI 3 Chassis Intrusion PIIX4E PCI 2 JBT1 PCI 1 RAID PORT SBLINK IDE LED/KEYLOCK/SPEAKER BIOS... -
Page 19: Super P6Sbu Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6SBU Figure 1-7. SUPER P6SBU Motherboard Image 1-10... -
Page 20: Super P6Sbu Motherboard Layout
Chapter 1: Introduction 8.875" PS/2 KB PS/2 MOUSE JOH: Overheat LED J17, J18 JA5, JA6: SCSI Termination Parallel Port S-TERM JP11 12" 3860 12" 1938 UA10 PCI 4 JBT2: Ext Battery JPSI 7890 PCI 3 PIIX4E PCI 2 SCSI LED PCI 1 RAID PORT JJ14... -
Page 21: Super P6Sbs Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6SBS Figure 1-9. SUPER P6SBS Motherboard Image 1-12... -
Page 22: Super P6Sbs Motherboard Layout
Chapter 1: Introduction 8.875" PS/2 KB PS/2 MOUSE JOH: Overheat LED J17, J18 JA5, JA6: SCSI Termination Parallel Port 12" Chassis 12" Intrusion JP11 PCI 4 JBT2: Ext Battery PCI 3 PIIX4E SCSI LED PCI 2 SBLINK PCI 1 RAID PORT JJ14 JP20 BIOS... -
Page 23: Super P6Sba Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6SBA Figure 1-11. SUPER P6SBA Motherboard Image 1-14... -
Page 24: Super P6Sba Motherboard Layout
Chapter 1: Introduction 7" PS/2 KB PS/2 MOUSE CPU FAN J17, J18 Parallel Port RESET JP11 SPEA- LOCK 12" 12" JP20 JL1: Chassis Intrusion JOH: Overheat LED JBT2: Ext Battery PCI 4 PCI 3 JBT1 PCI 2 PIIX4E BIOS PCI 1 JJ14 PW-LED 7"... -
Page 25: Super P6Sbm Image
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM SUPER P6SBM Figure 1-13. SUPER P6SBM Motherboard Image 1-16... -
Page 26: Super P6Sbm Motherboard Layout
Chapter 1: Introduction 8.050" J 3 4 P S / 2 K B B Z 1 P S / 2 MOUSE BATTERY J 1 7 , J 1 8 U S B JP11 J 1 9 P a r a l l e l Port 9.6"... -
Page 27: 440Bx Agp Set: System Block Diagram
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM C P U C P U Host Bus S D R A M A G P 440BX Port PCI Slots SMBus APIC PIIX4E IDE Ports Power SCSI Management U S B U S B Ports ISA Slots BIOS Figure 1-15. - Page 28 P6SBA and P6SBM Motherboards* * Bold text denotes variations in features. The following list covers the general features of the SUPER P6DBS, P6DBE, P6DBU, P6SBU, P6SBS, P6SBA and P6SBM motherboards. • Dual Pentium II 233/266/300/333 MHz processor at 66 MHz bus speed or...
- Page 29 Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM • Chassis intrusion detection • System resource alert • Hardware BIOS virus protection • Switching voltage regulator for the CPU core ® ® • SUPERMICRO SUPER Doctor and Intel LANDesk Client Manager (LDCM) support ACPI/PC 98 Features •...
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Page 30: Chipset Overview
Chapter 1: Introduction Dimensions • SUPER P6DBS - ATX (12" x 9.65") * See board diagram for full measurements • SUPER P6DBE - ATX (12" x 9.6") • SUPER P6DBU - ATX (12" x 9.65") * See board diagram for full measurements •... - Page 31 Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Seven On-Board Voltage Monitors for the CPU Core(s), CPU I/O, +3.3V, ± ± ± ± ± 5V, and ± ± ± ± ± 12V The on-board voltage monitor will scan the seven monitored voltages continu- ously. Once a voltage becomes unstable, it will report a warning or an error message on the screen.
- Page 32 Chapter 1: Introduction Chassis Intrusion Detection The chassis intrusion circuitry can detect unauthorized intrusion to the system. The chassis intrusion connector is located on JL1. Attach a micro-switch to JL1. When the micro-switch is closed, it means that the chassis has been opened. The circuitry will then alert the user with a warning message when the system is turned on.
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Page 33: Solo-1 Pci Audio Drive
Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM • Receive notification for system events • Transfer files to and from client workstations • Remotely reboot client workstations PCI Audio Drive Solo-1 ® (Standard on P6SBM, OEM option on P6SBU) The Solo-1 PCI Audio Drive feature implements a single-chip PCI audio solution to provide high-quality audio processing while maintaining full legacy DOS game compatibility. -
Page 34: Acpi/Pc 98 Features
Chapter 1: Introduction ACPI/PC 98 Features ACPI stands for Advanced Configuration and Power Interface. The ACPI speci- fication defines a flexible and abstract hardware interface that provides a stan- dard way to integrate power management features throughout a PC system, including hardware, operating system and application software. -
Page 35: Wake-On-Lan
It is even more important for Pentium II processors that have high CPU clock rates of 300 MHz and above. SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM accommodates ATX power supplies. Although most power supplies generally meet the specifi- cations required by the CPU, some are inadequate. -
Page 36: Super I/O
AIC -7895 MultiChannel Single-Chip UltraSCSI SUPER P6DBS/P6SBS has an on-board SCSI controller which is 100% compat- ible with all major operating and hardware platforms. PCI 2.1 and SCAM Level 1 compliance are assured. Two independent UltraSCSI channels provide a per channel data transfer rate of 40 MB/s. - Page 37 Manual UPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM When Fast SCSI devices are connected, the total length of all cables (internal and external) must not exceed 3 meters (9.8 ft) to ensure reliable operation. If no Fast SCSI devices are connected, the total length of all cables must not exceed 6 meters (19.7 ft).
- Page 38 Chapter 1: Introduction 1-29...
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Page 39: Chapter 2: Installation
Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Static-sensitive electrical discharge can damage electronic components. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from static discharge. - Page 40 Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM 2. Install the retention mechanism attach mount under the motherboard. Do this before mounting the motherboard into the chassis. Do not screw too tightly. Mount the two black plastic pegs onto the motherboard (Figure 2.1). These pegs will be used to attach the fan heatsink supports.
- Page 41 Chapter 2: Installation alignment notch in the SEC cartridge fits over the plug in Slot 1. Push the processor down firmly, with even pressure on both sides of the top, until it is seated. Figure 2-2. Retention Mechanism Top of Processor Do not screw too tightly! 6.
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Page 42: Oem Pentium Ii And Heat Sink Support
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Figure 2-3. Attaching the Fan Power Cable OEM Pentium II and Heat Sink Support The heat sink support consists of a top bar, a base bar, four posts on the top bar and two posts on the base bar. The two posts on the base snap into the motherboard. -
Page 43: Installation Of The Universal Retention Mechanism
Chapter 2: Installation When removing the Pentium II processor, avoid pressing down on the motherboard or components. Instead, press down on the plastic connectors. Installation of the Universal Retention Mechanism (URM)* Please Note! Screws and washers attach from the bottom of the board and must be installed before mounting the board to the chassis. - Page 44 Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Figure 2-5. Installing the Celeron Processor Figure 2-6. URM and Celeron Installation Supero Screw holes for retention URM with arms folded mechanism Note: Left and Right arms are defined Note notch in socket Top view of Celeron cap...
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Page 45: Explanation And Diagram Of Jumper/Connector
Chapter 2: Installation Explanation and Diagram of Jumper/ Connector C o n n e c t o r Pins To modify the operation of the motherboard, jumpers can be used J u m p e r to choose settings. Jumpers cre- C a p ate shorts between two pins and change the function of the con-... -
Page 46: Mounting The Motherboard In The Chassis
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Mounting the Motherboard in the Chassis All the motherboards have standard mounting holes to fit different types of chassis. Chassis may come with a variety of mounting fasteners, made of metal or plastic. Although a chassis may have both metal and plastic fas- teners, metal fasteners are the most highly recommended because they ground the system board to the chassis. -
Page 47: Pw_On Connector
Chapter 2: Installation PW_ON Connector The PW_ON connector is located on pins 9 and 10 of JF2. Momen- Table 2-5 tarily contacting both pins will PW-ON Connector Pin Definitions power on/off the system. for JF2 user can also configure this but- ton to function as a suspend but- N u m b e r Definition... -
Page 48: Speaker Connector
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Table 2-9 Speaker Connector Speaker Connector Pin Definitions for The speaker connector is located N u m b e r Function Definition on pins 10 to 13 of JF1. See Table Red wire, Speaker data K e y No connection 2-9 for pin definitions. -
Page 49: Atx Serial Ports
Chapter 2: Installation ATX Serial Ports Table 2-13 ATX Serial Ports Pin Definitions ATX serial port COM1 is located Pin Number Definition Pin Number Definition on J20 and serial port COM2 is D C D C T S D S R D T R located on J21. -
Page 50: Chassis Intrusion
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Chassis Intrusion Table 2-18 Chassis Intrusion The Chassis Intrusion Detector is Detector Settings on located on JL1. See chapter one, board layouts, and PC Health Moni- N u m b e r Definition Intrusion Input tor page 1-18 for more information. - Page 51 Chapter 2: Installation Side View of DIMM Installation into Socket PC100 PC100 To Install: Notches Notches Insert DIMM vertically, press down until it snaps into place. Note: Notches should align Pay attention with the to the two receptive points on the socket notches.
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Page 52: Parallel Port Connector
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM two hard disk drives and the SCSI adapter. (Note: most SCSI hard drives are single-ended SCSI devices.) The SCSI ID is determined by jumpers or a switch on the SCSI device. The last internal (and external) SCSI device cabled to the SCSI adapter must be terminated. -
Page 53: Scsi Connectors
Chapter 2: Installation Table 2-22 68-pin Single End SCSI Connector Pin Pin Number Function Pin Number Function G N D -DB (12) G N D -DB (13) G N D -DB (14) G N D -DB (15) G N D Parity H SCSI Connectors G N D... -
Page 54: Scsi Lvd 68-Pin Connector
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA/P6SBM Table 2-24 SCSI LVD 68-pin Connector Connector Connector Contact Contact N u m b e r Signal Names N u m b e r Signal Names +DB(12) -DB(12) +DB(13) -DB(13) +DB(14) -DB(14) +DB(15) -DB(15) +DB(P1) -DB(P1) +DB(0) -
Page 55: Agp Port
Chapter 2: Installation Table 2-25 AGP Port Pin Definitions for J8 Pin # Pin # Spare 1 2 V Vddq3.3 Vddq3.3 5.0V Spare A D 2 1 A D 2 2 5.0V Reserved* A D 1 9 A D 2 0 U S B + U S B - G N D... -
Page 56: Chapter 3: Troubleshooting
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures and flowchart to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. -
Page 57: No Power
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA No Power Make sure the default jumper is on and the CPU is correctly set up. Turn power switch on and off to test system. If power is still not on, turn off system power to move jumper setting on JP20 from 2-3 to 1-2. -
Page 58: Losing The System's Setup Configuration
Chapter 3: Troubleshooting Losing the System’s Setup Configuration Check the jumper JBT1 setting. Ensure that you are using a high quality power supply. A poor quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 1 of this manual for details. -
Page 59: Frequently Asked Questions
Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Frequently Asked Questions Question: What are the differences between the various memories that the 440BX motherboard can support? Answer: The 440BX integrates a main memory DRAM controller that supports a 64-bit or 72-bit (64 bit memory data plus 8 ECC bits.) DRAM from 8 MB to 512 MB for SDRAM and from 8 MB to 1 GB for EDO or registered DIMM. - Page 60 Question: I have memory problems. What is the correct memory to use and which BIOS setting should I choose? Answer: The correct memory to use on the SUPER P6DBS/P6DBE/P6DBU/ P6SBU/P6SBS/P6SBA is 168-pin DIMM 3.3v non-buffered SPD (Serial Present Detection) SDRAM, SDRAM and EDO memory. SPD SDRAM is preferred but is not necessary.
- Page 61 Manual SUPER P6DBS/P6DBE/P6DBU/P6SBU/P6SBS/P6SBA Answer: The supplied compact disc has quite a few drivers and programs that will greatly enhance your system. We recommend that you review the CD and install the applications you need. Applications included on the CD are PCI IDE Bus Master drivers for Windows 95 and Windows NT, 440BX chipset drivers for Windows 95, and Super Doctor Monitoring software.
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Page 62: Returning Merchandise For Service
Chapter 3: Troubleshooting Answer: Insert the Supermicro CD that came with the motherboard into your CD- ROM drive. Double click on your CD-ROM icon (which can be found in "My Computer") to access the CD, then double click on the red "S" icon named "setup.exe". -
Page 63: Chapter 4: Ami Bios
Chapter 4: AMI BIOS Chapter 4 AMI BIOS Introduction This chapter describes the AMIBIOS for the Intel 440BX Pentium II 400/350/ 333/300/266/233 MHz processors. The AMI ROM BIOS is stored in the Flash EEPROM and is easily upgraded using a floppy disk-based program. System BIOS ®... -
Page 64: Bios Features
BIOS User's Manual American AMIBIOS (c) 1997 American Megatrends, Inc. M e g a Trends 0404981500 Pentium II Motherboard Made in USA R1.0 U P E R BIOS date code Checking NVRAM xxxxx KB OK BIOS revision code Hit <DEL> if you want to run SETUP (C) Super Micro Computer, Inc., XX-XXXX-XXXXXX-XXXXXXXX-XXXXXX-XXXX-X BIOS Features... -
Page 65: Bios Configuration Summary Screen
Chapter 4: AMI BIOS • five positive voltage inputs • two negative voltage inputs • three fan speed monitoring inputs BIOS Configuration Summary Screen AMIBIOS displays a screen that looks similar to the following when the POST routines complete successfully. AMIBIOS System Configuration (C) 1985-1997 American Megatrends Inc., Main Processor : Pentium(tm) II... - Page 66 BIOS User's Manual Figure 4-1. Standard Option Highlighted Figure 4-2. Settings for Standard Option...
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Page 67: Chapter 5: Running Setup
Chapter 5: Running Setup Chapter 5 Running Setup* *Optimal and Fail-Safe default settings are bolded in text unless otherwise noted. The WinBIOS Setup options described in this section are selected by choosing the appropriate high-level icon from the Standard Setup screen. All displayed icons are described in this section, although the screen display is often all you need to understand how to set the options. - Page 68 BIOS User's Manual is best to select Auto to allow AMIBIOS to determine the PIO mode. If you select a PIO mode that is not supported by the IDE drive, the drive will not work properly. If you are absolutely certain that you know the drive's PIO mode, select PIO mode 0-4, as appropriate Select Type .
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Page 69: 5-1-2 Advanced Setup
Chapter 5: Running Setup Date and Time Configuration Select the Standard option. Select the Date/Time icon. The current values for each category are displayed. Enter new values through the keyboard. Floppy A Floppy B Choose the Floppy Drive A or B icon to specify the floppy drive type. The settings are Not Installed, 360 KB 5¼... - Page 70 BIOS User's Manual Pri Master ARMD Emulated as Pri Slave ARMD Emulated as Sec Master ARMD Emulated as Sec Slave ARMD Emulated as Options for Pri Master ARMD Emulated as, Pri Slave ARMD Emulated as, Sec Master ARMD Emulated as and Sec Slave ARMD Emulated as are Auto, Floppy or Hard disk .
- Page 71 Chapter 5: Running Setup been tried for booting). If selected as No and all selected boot devices failed to boot, the BIOS will try not to boot from the other boot devices which may be present but not selected as boot devices in setup. Initial Display Mode This option determines the display screen with which the POST is going to start the display.
- Page 72 BIOS User's Manual PS/2 Mouse Support Settings for this option are Enabled or Disabled . When this option is set to Enabled , AMIBIOS supports a PS/2-type mouse. Primary Display This option specifies the type of display adapter card installed in the The settings are Absent, VGA/EGA , CGA40x25 , CGA80x25 or system.
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Page 73: 5-1-3 Chipset Setup
Chapter 5: Running Setup MPS Revision The settings for this option are 1.1 or 1.4. C000, 16K Shadow C400, 16K Shadow These options specify how the 32 KB of video ROM at C0000h is treated. The settings are: Disabled , Enabled or Cached . When set to Disabled, the contents of the video ROM are not copied to RAM. - Page 74 BIOS User's Manual SERR# (System Error) The settings for this option are Enabled or Disabled . Set to Enabled to enable the SERR# signal on the bus. BX asserts this signal to indicate a system error condition. SERR# is asserted under the following condi- tions: - In an ECC configuration, the 82443BX asserts SERR#, for single bit (correctable) ECC errors or multiple bit (non-correctable) ECC errors if SERR# signaling is enabled via the ERRCMD control register.
- Page 75 Chapter 5: Running Setup BX/GX Master Latency Timer (CLKs) This option specifies the master latency timings (in PCI clocks) for devices in the computer. It defines the number of PCI clocks a PCI master can own on the bus after PCI central arbiter removes the grant signal. The settings are Disabled , 32 , 64 , 96 , 128 , 160 , 192 or 224 .
- Page 76 BIOS User's Manual data back to DRAM system memory will resolve the problem. Most DRAM errors are soft errors. If a hard (uncorrectable) error occurs, writing the fixed data back to DRAM system memory does not solve the problem. In this case, the second time the error occurs in the same location, a Parity Error is reported, indicating an uncorrectable error.
- Page 77 Chapter 5: Running Setup determines the optimal delay), 2 SCLKs or 3 SCLKs . Note: The Optimal default setting is Auto and the Fail-Safe default setting is 3 SCLKs. Power Down SDRAM BX supports SDRAM power down mode to minimize SDRAM power usage.
- Page 78 BIOS User's Manual AGP SERR (Advanced Graphic Port System Error) BX asserts this signal to indicate a AGP system error condition. The settings for this option are Enabled or Disabled . Set to Enabled to enable the AGP SERR# signal. AGP Parity Error Response The settings for this option are Enabled or Disabled .
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Page 79: 5-1-4 Power Management
Chapter 5: Running Setup Type F DMA Buffer Control1 Type F DMA Buffer Control2 These options specify the DMA channel where Type F buffer control is implemented. The settings are Disabled , Channel-0 , Channel-1 , Chan- nel-2 , Channel-3 , Channel-4 , Channel-5 , Channel-6 or Channel-7 . DMA0 Type DMA1 Type DMA2 Type... - Page 80 BIOS User's Manual specified period of display inactivity has expired. The settings are Standby , Suspend or Off . Note: The Optimal default setting for this option is Suspend and the Fail-Safe setting is Standby . Video Power Down Mode This option specifies the power conserving state that the VGA video subsystem enters after the specified period of display inactivity has expired.
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Page 81: 5-1-5 Pci/Pnp Setup
Chapter 5: Running Setup Slow Clock Ratio The value of the slow clock ratio indicates the percentage of time the STPCLK# signal is asserted while in the thermal throttle mode. The settings are Disabled, 0-12 . 5% , 12.5- 25% , 25- 37 . 5% , 37 . 5-50% , 50 - 62 . - Page 82 BIOS User's Manual cards that are required for system boot. Currently, only Windows 95 is PnP-Aware. Set this option to No if the operating system (such as DOS, OS/2, Windows 3.x) does not use PnP. You must set this option cor- rectly.
- Page 83 Chapter 5: Running Setup This option forces IRQ14 and IRQ15 to a PCI slot on the PCI local bus. This is necessary to support non-compliant ISA IDE controller adapter cards. If an offboard PCI IDE controller adapter card is installed in the computer, you must also set the Offboard PCI IDE Primary IRQ and Offboard PCI IDE Secondary IRQ options.
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Page 84: 5-1-6 Peripheral Setup
BIOS User's Manual must be removed from the pool, the end user can use these options to reserve the IRQ by assigning an ISA/EISA setting to it. Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured as PCI/PnP. - Page 85 Chapter 5: Running Setup CPU Overheat Warning The settings for this option are Enabled or Disabled . When set to Enabled this option allows the user to set an overheat warning tempera- ture. CPU Overheat Warning Temperature Use this option to set the CPU overheat warning temperature. The settings are 25 °C through 75 °C in 1 °C intervals .
- Page 86 BIOS User's Manual Serial Port 2 Mode The settings for this option are Normal, IrDA or ASK IR . When set to IrDA, the IR Duplex Mode becomes available and can be set to either Half or Full. When set to ASK IR, the IrDA Protocol becomes available and can be set to 1.6 us or 3/16.
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Page 87: Security Setup
Chapter 5: Running Setup Security Setup 5-2-1 Supervisor User The system can be configured so that all users must enter a password every time the system boots or when the WINBIOS setup is executed. You can set either a Supervisor password or a User password. If you do not want to use a password, just press <Enter>... -
Page 88: Default Setting
BIOS User's Manual Default Setting Every option in WinBIOS Setup contains two default settings: a Fail-Safe default, and an Optimal default. 5-4-1 Optimal Default The Optimal default settings provide optimum performance settings for all devices and system features. 5-4-2 Fail-Safe Default The Fail-Safe default settings consist of the safest set of parameters. -
Page 89: Appendix A: Bios Error Beep Codes And Messages
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes & Messages During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process. - Page 90 BIOS User’s Manual Beeps Error message Description Refresh Failure The memory refresh circuitry on the motherboard is faulty. Parity Error A parity error was detected in the base memory (the first 64 KB block) of the system. Base 64 KB Memory Failure A memory failure occurred within the first 64 KB of memory.
- Page 91 Appendix A: BIOS Error Beep Codes If it beeps... then ... 1, 2, 3 times reseat the DIMM memory. If the system still beeps, replace the memory. 6 times reseat the keyboard controller chip. If it still beeps, replace the keyboard controller.
- Page 92 BIOS User’s Manual Error Message Information 8042 Gate -- A20 Gate A20 on the keyboard controller (8042) Error is not working. Replace the 8042. Address Line Short! Error in the address decoding circuitry on the motherboard. C: Drive Error Hard disk drive C: does not respond. Run the Hard Disk Utility to correct this problem.
- Page 93 Appendix A: BIOS Error Beep Codes Error Message Information CMOS Time and Run Standard Setup to set the date and time Date Not Set in CMOS RAM. D: Drive Error Hard disk drive D: does not respond. Run the Hard Disk Utility. Also check the D: hard disk type in Standard Setup to make sure that the hard disk drive type is correct.
- Page 94 BIOS User’s Manual Error Message Information Invalid Boot Diskette The BIOS can read the disk in floppy drive A:, but cannot boot the computer. Use another boot disk. Keyboard Is Locked... The keyboard lock on the computer is Unlock It engaged.
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Page 95: Appendix B: Ami Bios Post Diagnostic Error Messages
Appendix B: AMI BIOS POST Diagnostics Error Messages Appendix B AMI BIOS POST Diagnostic Error Messages This section describes the power-on self-tests (POST) port 80 codes for the AMI BIOS. Check Point Description Code copying to specific areas is done. Passing control to INT 19h boot loader next. - Page 96 BIOS User’s Manual Check Point Description keyboard controller command byte written. Next, issuing the pin 23 and 24 blocking and unblocking commands. Next, checking if the <End or <Ins> keys were pressed during power Initializing CMOS Initialize CMOS every boot AMIBIOS POST option...
- Page 97 Appendix B: AMI BIOS POST Diagnostics Error Messages Check Point Description Initialization before setting the video mode is complete. Configuring monochrome mode color mode settings next. Bus initialization system, static, output devices will be done next, if present. Passing control video perform required configuration before the video ROM test.
- Page 98 BIOS User’s Manual Check Point Description Initializing the bus input, IPL, and general devices next, if present. Displaying bus initialization error messages. The new cursor position has been read and saved. Displaying the Hit <DEL> message next. Preparing the descriptor tables next. The descriptor tables are prepared.
- Page 99 Appendix B: AMI BIOS POST Diagnostics Error Messages Check Point Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset.
- Page 100 BIOS User’s Manual Check Point Description The DMA page register test passed. Performing the DMA Controller 1 base register test next. controller base register test passed. Performing the DMA controller 2 base register test next. controller base register test passed. Programming DMA controllers 1 and 2 next.
- Page 101 Appendix B: AMI BIOS POST Diagnostics Error Messages Check Point Description programming before WINBIOS Setup been completed. Uncompressing WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next. Returned from WINBIOS Setup and cleared the screen. Performing any necessary programming after WINBIOS Setup next.
- Page 102 BIOS User’s Manual Check Point Description Any initialization required after the option ROM test has been completed. Configuring the timer data area and printer base address next. Set the timer and printer base addresses. Setting the RS-232 base address next. Returned after setting...
- Page 103 Appendix B: AMI BIOS POST Diagnostics Error Messages Check Point Description Returned from adaptor E000h control. Next, performing initialization required after the E000 option ROM had control. Initialization after E000 option control completed. Displaying the system configuration next. Building the multiprocessor table, if necessary. POST next.
- Page 104 BIOS User’s Manual If either <Ctrl><Home>was pressed or the system BIOS checksum is bad, next the system will go to checkpoint code E0h. Otherwise, going to checkpoint code D7h. B-10...