1802
C14
2813
A3
2820
G5
2824
B3
2829
1803
G14
2816
D7
2822
A3
2825
A3
2833
1810
B6
2818
C7
2823
B3
2826
D3
2834
1
2
3CDC-LC
VrefCD10
part 2
3851
SPEEDSEL
47K
from part3
A
(7813/7)
for quad speed only
EYE-PATTERN
3709
2822
HF
1K
1n8
for double speed only
800mVpp
B
TB = 0.5µs/div
PORE
+3.3V
+3.3V
64
LDON
63
Innersw
3.2V
from part1 1801
62
C
EQSEL
to part1 7804/C
61
RW/DA
to part1 7801/pin11
60
59
M1
58
3855
D
57
+3.3V
15R
3.2V
56 SL
SL
55
FO
54
RA
53
E
52
+3servo
3.2V
DOBM
51
50
49
F
3716
100R
G
H
I
. . . V DC voltages measured in
PLAY MODE
with following conditions:
V
EVM
"+10V" = 10V
"+5V" = 5V
1
2
10-9
G5
2837
B4
2845
C7
3716
F2
3767
B6
2838
A4
3709
A3
3717
G2
3769
B6
2843
C7
3712
G2
3759
F2
3804
3
4
5
3853
470R
7805
BC847B
+3.3V
2825
6n8
2813
PHOTO DIODES
3n3
3867*
CD DRIVE on PART1
22K
220K
3826
2837
2823
4u7
47p
1.7V 1.7V
1.7V
3.2V
0.8V
1.6V
1.6V
1.6V 1.6V
1.6V
1.6V 1.6V
1
2
3
4
5
6
7
8
9
10
11
12
13
V1
ANALOG / DIGITAL
CONVERTER
FRONTEND
V5
Signal Processor
V4
SAA7324/SAA7325
PRE-
7802
MOTO2
PROCESSING
DIG.
MOTO1
PLL
CONTROL
FUNCTION
VSSD3
VDDD2C
AUDIO
PROCESSOR
FO
RA
CFLG
PEAK
VDDD1P
DET.
DOEM
SUBCODE
MICROCONTROLLER
SERIAL DATA
VSSD2
PROCESSOR
INTERFACE
LOOPBACK
INTERFACE
CL11|4
48
47
46
45
44
43
42
41
40
39
38
37
36
3858*
2829
2820
3859*
27p
1n
3860*
3861
+3.3V
10K (4x)
3832
+3.3V
10K
* marked components only forseen
3
4
5
E11
3809
B2
3813
F5
3823
A4
3828
B3
F11
3810
G5
3814
F4
3826
B3
3832
G6
F7
3812
F5
3819
G5
3827
B4
3849
F6
6
7
8
2834
2833
33p
33p
1810
AT-49
+3.3V
1.6V
1.6V
14
15
16
17
2843
3.2V
100n
TIMING
LN
18
LP
19
VNEG
20
VPOS
21
3V
RN
22
RP
23
SELPLL
24
3V
TEST1
25
CL16
26
+3.3V
DATA
27
WCLK
28
SCLK
29
EF
30
TEST2
31
32
KILL
35
34
33
3804
+3.3V
10K
6
7
8
10-9
3851
A3
3858
G4
3861
G4
3865
D7
3853
A4
3859
G4
3862
B7
3867
A4
3855
D2
3860
G4
3864
A4
6807
F11
9
10
11
12
EBU
=
DIGITAL AUDIO
PORE
SILD
RAB
SICL
SDA
voltage stab.
3767
+3.3V
7815
33R
3.3V
BC847B
3769
4.1V
100R
+5V
6811
+10V
1N4003
9
10
11
12
6811
G11
7802
C5
6812
B2
7815
F11
7802
A3
13
14
A
B
C
to CDR Module
1802
8
EBU_GND
EBU
7
EBU
PORE
6
CD10_RESET
SILD
5
SILD
RAB
4
RAB
D
SICL
3
SICL
SDA
2
SDA
1
GND
FMN-STRK
E
F
1805
9
Not Connected
8
+5V
7
GND
G
6
+10V
5
SW_INFO
SW_INFO
4
SHR_STR
SHR_STR
3
SHR_CL
SHR_CL
2
SHR_DATA
SHR_DATA
1
Not Connected
FE-ST-VK-N
H
I
3CDC-LC Herman Mainboard Sheet2 2001-06-29 (CDR Version)
13
14