LG 55LH80YD-AB Service Manual page 37

FRC DDR2
URSA_DQ[0-31]
7:AB4;AL20
AR800
URSA_DQ[27] DDR_DQ[27]
URSA_DQ[28] DDR_DQ[28]
URSA_DQ[25] 56 DDR_DQ[25]
URSA_DQ[30] DDR_DQ[30]
AR801
URSA_DQ[22] DDR_DQ[22]
URSA_DQ[17] DDR_DQ[17]
URSA_DQ[19] 56 DDR_DQ[19]
URSA_DQ[20] DDR_DQ[20]
AR802
URSA_DQ[31] DDR_DQ[31]
URSA_DQ[24] DDR_DQ[24]
URSA_DQ[26] 56 DDR_DQ[26]
URSA_DQ[29] DDR_DQ[29]
AR803
URSA_DQ[23] DDR_DQ[23]
URSA_DQ[16] DDR_DQ[16]
URSA_DQ[18] 56 DDR_DQ[18]
URSA_DQ[21] DDR_DQ[21]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright ⓒ 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
+1.8V_MEMC
BLM18PG121SN1D
L800
PI Result
+1.8V_FRC_DDR
IC800
H5PS5162FFR-S6C
DDR_DQ[16] DQ0 VREF
G8 J2
DDR_DQ[17] DQ1
G2
DDR_DQ[18] DQ2
H7
A0 DDRB_A[0]
M8
DDR_DQ[19] DQ3 DDRB_A[10]
H3
A1 DDRB_A[1]
M3
DDRB_A[1]
DDR_DQ[20] DQ4
H1
A2 DDRB_A[2]
M7
DDR_DQ[21] DQ5 DDRB_A[3]
H9
A3 DDRB_A[3]
N2
DQ6 DDRB_A[9]
DDR_DQ[22]
F1
A4 DDRB_A[4]
N8 DDRB_A[12]
DDR_DQ[23] DQ7
F9
A5 DDRB_A[5]
N3
DDR_DQ[24] DQ8 DDRB_A[7]
C8
A6 DDRB_A[6]
N7 DDRB_A[5]
DDR_DQ[25] DQ9
C2
A7 DDRB_A[7]
P2
DDR_DQ[26] DQ10 DDRB_A[0]
D7
A8 DDRB_A[8]
P8 DDRB_A[2]
DDR_DQ[27] DQ11
D3
A9 DDRB_A[9]
P3
DDR_DQ[28] DQ12 DDRB_A[4]
D1
A10/AP DDRB_A[10]
M2 DDRB_A[6]
DDR_DQ[29] DQ13
D9
A11 DDRB_A[11]
P7
DDR_DQ[30] DQ14
B1
B_URSA_RASZ
A12 DDRB_A[12]
R2
DDR_DQ[31] DQ15
B9 B_URSA_CASZ
DDRB_A[11]
+1.8V_FRC_DDR
BA0 DDRB_A[8]
L2 B_URSA_BA0
BA1
L3
VDD5 B_URSA_BA1
A1
R803 22
VDD4
E1
VDD3 CK
J9 J8
VDD2 CK R804 22
M9 K8
VDD1 CKE
R1 K2
ODT R805 22
K9
VDDQ10 CS
A9 L8
VDDQ9 RAS
C1 K7
VDDQ8 CAS
C3 L7
VDDQ7 WE
C7 K3
VDDQ6
C9
VDDQ5
E9
LDQS R806 56
F7
VDDQ4
G1
UDQS R807 56
B7
VDDQ3
G3
VDDQ2
G7
VDDQ1 LDM R808 56
G9 F3
UDM R809 56
B3
VSS5 LDQS R810 56
A3 E8
VSS4 UDQS R811 56
E3 A8
VSS3
J3
VSS2
N1
NC4
L1
VSS1
P9
NC5
R3
NC6
R7
VSSQ10
B2
NC1
A2
VSSQ9
B8
NC2
E2
VSSQ8
A7
NC3 7:R4;U10
R8
VSSQ7
D2
+1.8V_FRC_DDR 7:R4;U10
VSSQ6
D8 7:T4;U9
VSSQ5
E7 VSSDL
J7 7:R4;U9
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VSSQ1 VDDL
H8 J1
EAN55705501
HONG YEON HYUK
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_FRC_DDR +1.8V_FRC_DDR
+1.8V_FRC_DDR
URSA_A[3] AR811 DDRA_A[3]
AR804 URSA_A[10] URSA_A[1] 22 DDRA_A[1]
22 URSA_A[1] URSA_A[10] DDRA_A[10]
URSA_A[3]
URSA_A[9] URSA_A[9] DDRA_A[9]
AR805 URSA_A[12] URSA_A[12] AR812 DDRA_A[12]
22 URSA_A[7] URSA_A[7] 22 DDRA_A[7]
URSA_A[5] URSA_A[5] DDRA_A[5]
URSA_A[0] URSA_A[2] DDRA_A[2]
AR806 URSA_A[2] URSA_A[0] AR813 DDRA_A[0]
22 URSA_A[4] URSA_A[6] 22 DDRA_A[6]
URSA_A[6] URSA_A[4] DDRA_A[4]
AR807
AR810
URSA_RASZ URSA_RASZ A_URSA_RASZ
URSA_CASZ URSA_CASZ A_URSA_CASZ
URSA_A[8] 22 DDRA_A[8]
URSA_A[11]
URSA_A[8] URSA_A[11] DDRA_A[11]
22
R812
URSA_MCLK URSA_MCLK1
7:I11 7:AA4
R813
URSA_MCLKZ URSA_MCLKZ1
7:I10 7:AB4
B_URSA_MCLKE U8 A_URSA_MCLKE
T9
R814
URSA_ODT URSA_ODT
7:I10;X13 7:I10;Q13
B_URSA_RASZ A_URSA_RASZ
R15 X15
B_URSA_CASZ A_URSA_CASZ
R15 X15
B_URSA_WEZ A_URSA_WEZ
T9 U8
R815
URSA_DQS2 URSA_DQS0
7:I14 7:X4
R816
URSA_DQS3 URSA_DQS1
7:I13 7:Y4
R817
URSA_DQM2 URSA_DQM0
7:I15 7:W4
R818
URSA_DQM3 URSA_DQM1
7:I15 7:W4
R819
URSA_DQSB2 URSA_DQSB0
7:I14 7:X4
R820
URSA_DQSB3 URSA_DQSB1
7:I13 7:Y4
AR808
B_URSA_BA0 URSA_BA0
7:R4;T9
B_URSA_BA1 URSA_BA1
7:R4;T8
B_URSA_MCLKE URSA_MCLKE
Q14 7:T4;T8
Q12 B_URSA_WEZ URSA_WEZ
7:R4;T8
22
AR809
URSA_BA0 A_URSA_BA0
AA15
URSA_BA1 A_URSA_BA1
AA15
URSA_MCLKE A_URSA_MCLKE
Z14
URSA_WEZ A_URSA_WEZ
X12
22
resonance Compensation
+1.8V_MEMC
+1.8V_FRC_DDR
+1.8V_FRC_DDR
IC801
H5PS5162FFR-S6C
VREF DQ0 DDR_DQ[0]
J2 G8
DQ1 DDR_DQ[1]
G2
DQ2 DDR_DQ[2]
H7
DDRA_A[0] A0
M8
DQ3 DDR_DQ[3]
H3
DDRA_A[1] A1
M3
DQ4 DDR_DQ[4]
H1
DDRA_A[2] A2
M7
DQ5 DDR_DQ[5]
H9
DDRA_A[3] A3
N2
DQ6
DDR_DQ[6]
F1
DDRA_A[4] A4
N8
DQ7 DDR_DQ[7]
F9
DDRA_A[5] A5
N3
DQ8 DDR_DQ[8]
C8
DDRA_A[6] A6
N7
DQ9 DDR_DQ[9]
C2
DDRA_A[7] A7
P2
DQ10 DDR_DQ[10]
D7
DDRA_A[8] A8
P8
DQ11 DDR_DQ[11]
D3
DDRA_A[9] A9
P3
DQ12 DDR_DQ[12]
D1
DDRA_A[10] A10/AP
M2
DQ13 DDR_DQ[13]
D9
DDRA_A[11] A11
P7
DQ14 DDR_DQ[14]
B1
DDRA_A[12] A12
R2
DQ15 DDR_DQ[15]
B9
BA0 +1.8V_FRC_DDR
A_URSA_BA0 L2
BA1
L3
A_URSA_BA1 VDD5
A1
22
VDD4
E1
CK VDD3
J8 J9
22 CK VDD2
K8 M9
CKE VDD1
K2 R1
22 ODT
K9
CS VDDQ10
L8 A9
RAS VDDQ9
K7 C1
CAS VDDQ8
L7 C3
WE VDDQ7
K3 C7
VDDQ6
C9
VDDQ5
E9
56 LDQS
F7
VDDQ4
G1
56 UDQS
B7
VDDQ3
G3
VDDQ2
G7
56 LDM VDDQ1
F3 G9
56 UDM
B3
56 LDQS VSS5
E8 A3
56 UDQS VSS4
A8 E3
VSS3
J3
VSS2
N1
NC4
L1
VSS1
P9
NC5
R3
NC6
R7
VSSQ10
B2
NC1
A2
VSSQ9
B8
NC2
E2
VSSQ8
A7
NC3
R8
VSSQ7
+1.8V_FRC_DDR D2
VSSQ6
D8
VSSQ5
VSSDL E7
J7
VSSQ4
F2
VSSQ3
F8
VSSQ2
H2
VDDL VSSQ1
J1 H8
EAN55705501
MSTAR (JUNO)
MST7323S DDR2
URSA_DQ[0-31]
7:AB4;D20
AR814
DDR_DQ[15] URSA_DQ[15]
DDR_DQ[8] 56 URSA_DQ[8]
DDR_DQ[10] URSA_DQ[10]
DDR_DQ[13] URSA_DQ[13]
AR815
DDR_DQ[7] URSA_DQ[7]
DDR_DQ[0] 56 URSA_DQ[0]
DDR_DQ[2] URSA_DQ[2]
DDR_DQ[5] URSA_DQ[5]
AR816
DDR_DQ[11] URSA_DQ[11]
DDR_DQ[12] 56 URSA_DQ[12]
DDR_DQ[9] URSA_DQ[9]
DDR_DQ[14] URSA_DQ[14]
AR817
DDR_DQ[6] URSA_DQ[6]
DDR_DQ[1] 56 URSA_DQ[1]
DDR_DQ[3] URSA_DQ[3]
DDR_DQ[4] URSA_DQ[4]
09.02.04
8 12
LGE Internal Use Only