Dg-Board (4 Of 16) Schematic Diagram - Panasonic TH-42PV7AZ Service Manual

15.17. DG-Board (4 of 16) Schematic Diagram

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DG-BOARD (4/16)
!
TXNDG1HRTP (PV7AZ)
TXNDG1HRTH (PV7HS)
TXNDG1HRTM (PV7M)
TXNDG1HRTX (PV7MR)
TXNDG1HRTA (PX7A)
DTV
CRNo.8300-8999
FE 8300-8399
CI 8400-8499
AV_OUT 8500-8549
NAND/NOR 8550-8599
EEPROM 8600-8619
D-LATCH 8620-8649
SMART_CARD 8650-8699
SUPPORT_CARD 8700-8799
SD_CARD 8800-8849
MPEG 8850-8949
MODEM 8950-8999
K1KA04AA0104
SUB5V
JK8702
1
+5V
2
SBI0
3
SBO0
4
15
TH-42PV7AZ/HS/M/MR, PX7A
DG-Board (4 of 16) Schematic Diagram
28 29
SUB3.3V
D-LATCH
IC8621
C0JBAZ002845
1 OE 20
Vcc
AA_EA8 R8621 68 2 Q0 19 R8629 68
Q7
AA_ED0 3 18
D0
D7
AA_ED1
4 D1 17
D6
AA_EA9 R8622 5 16 R8630
68 Q1 68
Q6
AA_EA10
R8623 68 6 Q2 15 R8631 68
Q5
AA_ED2 7 14
D2
D5
AA_ED3
8 D3 13
D4
AA_EA11 R8624 68 9 Q3 12 R8632 68
Q4
10 GND 11
LE
D-LATCH
IC8622
C0JBAZ002845
1 OE 20
Vcc
AA_EA16 R8625 68 2 19 R8633 68
Q0
Q7
AA_ED8
3 D0 18
D7
AA_ED9 4 D1 17
D6
AA_EA17 5 16
R8626 68 Q1 R8634 68
Q6
AA_EA18
R8627 68 6 Q2 15 R8635 68
Q5
AA_ED10 7 14
D2
D5
AA_ED11
8 D3 13
D4
AA_EA19 R8628 68 9 12 R8636 68
Q3
Q4
10 GND 11
LE
SUB3.3V
R8712 R8711
10k
10k
TP8750
AA_ESZ0
TP8751
AA_ESZ1
TP8757
TP8758
AA_SBI0
AA_SBO0
30 31
AF_NAND_RY/BY
R8556 68
R8867
EXB2HV680JV
AA_ED0
AA_ED1
AA_ED2
AA_ED3
AA_ED4
AA_ED5
AA_ED6
AA_ED7
AA_ED8
C8622
16V
AA_EA15 AA_ED9
0.1u
AA_ED10
AA_ED7
AA_ED11
AA_ED6
AA_ED12
AA_ED13
AA_EA14
AA_ED14
AA_EA13
AA_ED15
R8866
AA_ED5
EXB2HV680JV
AA_ED4 R8865
EXB2HV680JV
AA_EA0
AA_EA12
AA_EA1
AA_XEAS AA_EA2
AA_EA3
AA_EA4
AA_EA5
AA_EA6
AA_EA7
AA_EA24 R8710 68
C8621
AA_EA23 16V
0.1u
AA_ED15
SUB3.3V
AA_ED14
AA_EA22
SUB3.3V
AA_EA21
clk_mode[0-5]
Debug Use
AA_ED13
AA_ED12
AA_EA20
CONNECTED TO GENX4 FROM LiteII ON SHEET008
No INT.PD at RESET
Just for Debug Use
SUB3.3V
TP8852
TP8853
R8871
10k
AA_FE_XRST R8947 68
R8877
R8874 AA_XECS0 68
10k
AA_XECS1 R8878 68
R8879
AA_XECS2 68
TP8854
R8880 68
AA_XEAS
R8881 68
R8882 68
AA_XNMIRQ
R8868
68 AA_XIRQ1 R8883 68
R8884
AA_XIRQ2 68
R8885 68
AA_ERXW
AA_XERE R8886 68
R8887
AA_XEWE0 68
AA_XEWE1 R8888 68
R8889
AA_XEDK 68
AA_ESZ0 R8891 68
R8892
AA_ESZ1 68
AA_XRST R8893 0
R8894
AA_BOOTSWAP 68
R8870 0
AG_DTV_VOUTENB R8896
0
AG_SD_BOOT_STS
R8897
0
TP8851
0V
R8900
AA_SBI0 68
AA_SBO0 R8901 68
SUB3.3V
TP8767 R8742
10k
R8735 68
R8732
R8736
100 68
R8737 68
R8738 68
R8739 68
R8745 R8746 R8749
10k 10k 10k
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69
TH-42PX7A / TH-42PV7AZ / TH-42PV7HS / TH-42PV7M / TH-42PV7MR
MAIN3.3V
LiteII
SUB3.3V
D8901
to (1/16)
NAND I/F MA3X704A0L
NANDRYBY non
AD_SDA0
R8911 68
AD_SCL0
R8912 68
ADDRESS MPXed, if D-Latch AD_SDA1 R8913 68
ExBUS
ED0 /EA8 AD_SCL1
R8914 68
ED1 /EA9 AD_SDA2 R8915 68
ED2 /EA10 AD_SCL2
R8916 68
ED3 /EA11 AD_SDA3
R8917 68
ED4 /EA12 AD_SCL3 R8918 68
ED5 /EA13
ED6 /EA14
ED7 /EA15
ED8 /EA16
ED9 /EA17
ED10 /EA18
ED11 /EA19
ED12 /EA20
AG_MODEM_LED2/CLK74SEL
ED13 /EA21
ED14 /EA22 R8927
0
ED15 /EA23
ED/EA with Int.PU at start
(XECS2,3 setting)
EA0
EA1
EA2 ExBUS
EA3
EA4
EA5
EA6
EA7
VI2P4 EA24 INT.PD
RESERVED
N.C. for CLKGEN port
RMCO PORT16[5]
VI2ENB PORT6[6]:PSV1 B_PORT
CI I/F
VI2P11 P_MAIN_SW
VI1P20 CI_OCP
CI_POWER_ON
AC_CHDI0
ADCCK RSV2 PORT5[2] Hi-Z AC_CHDI1
AC_CHDI2
SLRCK
RSV3 PORT5[1] Hi-Z
AC_CHDI3
AC_CHDI4
ExBUS
AC_CHDI5
XECS3,5,7: USED FOR OTHER PORPOSE PINS
XECS6 INT.PU AC_CHDI6
see also SDA2 for ea_pullup_sel
AC_CHDI7
XECS0 OUTPUT
XECS1 OUTPUT AC_CHVAL
XECS2 Reserved/(ed_pullup_sel) AC_CHSYNC
XECS4 OUTPUT/(BOOTBT)
AC_CHCLK
IS1DATA PORT16[4] Hi-Z
XNMIRQ INT.PU
SMTCMD0
XPDCD1
XIRQ1 NEED EXT.PU
NET0031303 SMTSEL0
XPDCD2
XIRQ2 NEED EXT.PU
SMTCLK0 XCI_IREQ
XIRQ3 for HDMI_INT in ADV sheet
AC_XPDWT
ERXW INT.PU
XERE INT.PU
XEWE0 INT.PU
XEWE1 INT.PU
XEDK INT.PU
ECLK OUTPUT
ESZ0 OUTPUT
ESZ1 OUTPUT
XECS7
XRST
BOOTSWAP INT.PU
VOUTENB INT.PD
ADIN PORT16[7], SD_BOOT Hi-Z TUNER SERIAL TS
CH0CLK
CH0PSYNC
VI1CLK2 CH0VAL
CH0DATA
0V
SBI0 DUBUG/JIG
SBO0
INT.PU
AA_SBI0
AA_SBO0
JTAG
TMS
TRST
TDI
TDO
TCK
TH-42PV7AZ/HS/M/MR, PX7A
DG-Board (4 of 16) Schematic Diagram
34 35
21
22
23
LiteII
to (1/16)
I2C
SDA0
SCL0
SDA1
SCL1
SBT0
SBT2
XECS3 (ea_pullup_sel)
H:Int.PU on EA
XECS5
CLKGEN_S2
25M
4.9152M
24.576M
PORT15[4]
Hi-Z
VI1P20
IS0PSYNC
AC_CHDI0
AC_CHDI1
AC_CHDI2
AC_CHDI3
AC_CHDI4
AC_CHDI5
AC_CHDI6
CI PARALLEL TS
AC_CHDI7
Hi-Z
AC_CHVAL
AC_CHSYNC
AC_CHCLK
SMTCMD0 Hi-Z
SMTSEL0 Hi-Z
SMTCLK0 Hi-Z
AC_XPDWT Hi-Z
CH1CLK Hi-Z
XEXDMK0 INT.PU
XEXDMR0 Hi-Z
SMTCMD1 Hi-Z
SMTSEL1 Hi-Z
XECS7 CI_#CE1 Hi-Z
SMTRST0 Hi-Z
CH1PSYNC INT.PU
CH1DATA INT.PU
VI2P20 PORT9[5] CI_XRST INT.PD
CH0CLK Hi-Z
CH0PSYNC INT.PD
CH0VAL INT.PD
CH0DATA INT.PD
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