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DIGITAL-LOGIC AG
FRAME*
Frame is driven by the current master to indicate the start of a transaction and will remain active until
the final data cycle.
TRDY*
Target Ready indicates the selected device's ability to complete the current data cycle of the
traansaction. Both IRDY* and TRDY* must be asserted to terminate a data cycle.
IRDY*
Initiator Ready indicates the master's ability to complete the current data cycle of the transaction.
STOP*
Stop indicates the current selected device is requesting the master to stop the current transaction.
DEVSEL*
Device Select is driven by the target device when its address is decoded.
IDSEL
Initialization Device Select is used as a chip-select during configuration.
LOCK*
Lock indicates an operation that may require multiple transactions to complete.
PERR*
Parity Error is for reporting data parity errors.
SERR*
System Error is for reporting address parity errors.
REQ*
Request indicates to the arbitrator that this device desires use of the bus.
GNT*
Grant indicates to the requesting device that access has been granted.
CLK
Clock provides timing for all transactions opn the PCI bus.
RST*
Reset is used to bring PCI-specific registers to a known state.
INTA*
Interrupt A is used to request Interrupts.
INTB*
Interrupt B is used to request Interrupts only for multi-function devices.
INTC*
Interrupt C is used to request Interrupts only for multi-function devices.
INTD*
Interrupt D is used to request Interrupts only for multi-function devices.
MSM800SEV/SEL/BEV/XEV/XEL Detailed Manual V1.7
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