Related Manuals for Contec SPC-8520-LA
Summary of Contents for Contec SPC-8520-LA
- Page 1 SBC Series Single Board Computer PCI Half for Pentium M with LAN, Audio SPC-8520-LA Celeron M 800MHz with LAN, Audio SPC-8521-LA User’s Manual CONTEC CO.,LTD.
- Page 2 Check Your Package Thank you for purchasing the CONTEC product. The product consists of the items listed below. Check, with the following list, that your package is complete. If you discover damaged or missing items, contact your retailer. Product Configuration List - Board (One of the following) [SPC-8520-LA or SPC-8521-LA]….1...
- Page 3 No part of this document may be copied or reproduced in any form by any means without prior written consent of CONTEC CO., LTD. CONTEC CO., LTD. makes no commitment to update or keep current the information contained in this document. The information in this document is subject to change without notice.
- Page 4 Handling Precautions ........................4 Environment ............................. 5 Inspection............................5 Storage .............................. 5 Disposal ............................5 SYSTEM REFERENCE Specifications............................7 Power Management Features ........................9 Power Requirements..........................9 Power Consumption ..........................9 Connector & Jumper Location ......................10 Block Diagram............................11 SPC-8520-LA, SPC-8521-LA...
- Page 5 HARDWARE INSTALLATIONS Installation procedure..........................13 CPU Installation (Only SPC-8520-LA):....................14 Audio Connector: CNA1 ........................15 Main Memory Installation: CND1......................15 Compact Flash Slot: CNE1 ........................16 Floppy Disk Drive Connector: CNF1....................17 Serial Port Connector: CNG1 , CNG2....................18 RS-422 / RS-485 specifications......................19 VGA Connector: CNV1.........................19 Primary IDE Connector: CNI1 ......................20 FAN1 Connector: CNJ1.........................21...
- Page 6 PnP/PCI Configuration Setup........................ 70 PC Health Status ............................ 72 Frequency/Voltage Control ........................73 Defaults Menu ..........................74 Supervisor/User Password Setting ......................74 Exit Selecting............................75 POST Messages ............................. 75 POST Beep ............................75 Error Messages ............................76 POST Codes............................80 SPC-8520-LA, SPC-8521-LA...
- Page 7 SPC-8520-LA , SPC-8521-LA...
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Page 8: Introduction
This product, which is equipped with the Intel(R) 852GM chip set, is a PCI bus compliant half-sized single board computer that supports SPC-8520-LA : Capable of equipping with the Pentium(R) M 1.6G - 2.0GHz or Celeron(R) M 1.3G - 1.5GBHz. -
Page 9: Option List
CPUPM-16 Pentium M 1.6GHz CPU CPUPMC-15 Celeron M 1.5GHz CPU CPUPMC-13 Celeron M 1.3GHz CPU Heat Sink Fan (For SPC-8520-LA) HSF-PM Heat Sink Fan for Pentium M/Celeron M Memory (PC2100 SDRAM No parity) PC-MDD256-200 200-Pin SO-DIMM DDR-Memory (PC2100, 256MB) PC-MDD512-200... -
Page 10: Customer Support
You can download updated driver software and differential files as well as sample programs available in several languages. Note! For product information Contact your retailer if you have any technical question about a CONTEC product or need its price, delivery time, or estimate information. Limited One Year Warranty CONTEC products are warranted by CONTEC CO., Ltd. -
Page 11: Safety Precautions
Handling Precautions CAUTION Do not modify the product. CONTEC will bear no responsibility for any problems, etc., resulting from modifying this product. Do not strike or bend the product. Otherwise, the product may malfunction, overheat, cause a failure or breakage. -
Page 12: Environment
(3) Store the package at room temperature at a place free from direct sunlight, moisture, shock, vibration, magnetism, and static electricity. Disposal When disposing of the product, follow the disposal procedures stipulated under the relevant laws and municipal ordinances. SPC-8520-LA, SPC-8521-LA... - Page 13 1. Introduction SPC-8520-LA , SPC-8521-LA...
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Page 14: System Reference
AC97 CODEC, One pin-header 10-pin connector for line-out, line-in, microphone-in. 1 - 255sec, 255 level Watchdog Timer When time up: RESET General-purpose I/F None Monitoring of the temperature of CPU and board, power supply voltage, and fan speed Hardware Monitor (Function of the Winbond W83627HG) SPC-8520-LA, SPC-8521-LA... - Page 15 *2 The one up to 122mm or less in the size of board can be used for two next slots of this board (one substance slot). PCI Slot Heat Sink Max.122mm Board *3 It depends on the specification of the CPU and the heat-sink. SPC-8520-LA , SPC-8521-LA...
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Page 16: Power Management Features
Minimum delay for reset to Power Good: 100 ms Minimum Power down warning: 1 ms The following table lists the power supply’s tolerances for DC voltages: Table 2.2. DC voltage tolerance DC Voltage Acceptable Tolerance ± 5% +5VSB (Standby) ± 5% +12V(For fan) ± 5% SPC-8520-LA, SPC-8521-LA... -
Page 17: Connector & Jumper Location
Clear CMOS Content Serial Port Connector CNG1 / CNG2 JKB1 Keyboard / Mouse Selector (SERIAL1,SERIAL2) CNV1 Analog RGB Connector RS-422A/485 Terminator CNI1 Primary IDE Connector JP2 / JP3 RS-232C/422A/485 Selector CNJ1 FAN1 Connector Clear ROM Content CNJ2 FAN2 Connector SPC-8520-LA , SPC-8521-LA... -
Page 18: Block Diagram
AC97 Primary Jack CODEC CFSlot (S-IDE) FWH BIOS ICH4 USB1/2 LPC I/F LPC SUPER I/O W83627 RJ-45 82562GZ PCI BUS SERIAL1 PS/2 PCI FINGER Parallel SERIAL2 RS-232C KB / MS Connector RS-232C RS-422 RS-485 Figure 2.2. Block Diagram SPC-8520-LA, SPC-8521-LA... - Page 19 2. System Reference SPC-8520-LA , SPC-8521-LA...
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Page 20: Hardware Installations
Installation procedure Confirm the power supply is off. Install the processor with correct orientation. (only SPC-8520-LA) Install the fan on top of the processor and connect it to the CNJI connector. (Only SPC-8520-LA) Insert the DRAM module with correct orientation. - Page 21 CPU Installation (Only SPC-8520-LA) The SPC-8520-LA supports a single Intel(R) Celeron M or Pentium M processor (FSB 400MHz). The processor’s VID pins automatically program the voltage regulator on the CPU board to the required processor voltage. The host bus speed is automatically selected. The processor connects to the CPU board through the 478-pins socket.
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Page 22: Audio Connector: Cna1
All memory components and DIMM used with this product must comply with the PC SDRAM Specification. These include : the PC SDRAM Specification (memory component specific), the PC Unbuffered DIMM Specification, and the PC Serial Presence Detect Specification. SPC-8520-LA, SPC-8521-LA... -
Page 23: Compact Flash Slot: Cne1
This product provides a Compact Flash interfaces. This interface is a very small removable mass storage device. It provides compatibility plus True IDE functionality compatible with ATA/ATA-4. Table 3.3. Compact Flash Slot CNE1 Pin No. Function Pin No. Function CS1# CS3# IOR# IOW# IRQ15 CSEL# SDRST# IORDY SDREQ SDDACK# CF_LED2# SDIAG SPC-8520-LA , SPC-8521-LA... -
Page 24: Floppy Disk Drive Connector: Cnf1
This connector supports the provided floppy drive ribbon cable. After connecting the single end to the product, connect the two plugs on the other end to the floppy drives. Table 3.4. Floppy Disk Drive Connector CNF1 Pin No. Function Pin No. Function N.C. FDC_DS1 INDEX STEP TRCK 0 HEAD DSKCHG SPC-8520-LA, SPC-8521-LA... -
Page 25: Serial Port Connector: Cng1 , Cng2
RS-422A RS-485 RTS- N.C. RTS+ N.C. CTS+ N.C. CTS- N.C. CAUTION For RS-485, TX+(pin 2) and RX+ (pin 3) must jumper together inside the D type connector. TX- (pin 1) and RX- (pin 4) is the same. SPC-8520-LA , SPC-8521-LA... -
Page 26: Rs-422 / Rs-485 Specifications
VGA Connector: CNV1 It is a VGA (Analog RGB) connector. The pin assignments are as follows: Table 3.8. VGA Connector (CN13) PIN No. Function PIN No. Function Green Blue N.C. N.C. DDC data H-Sync V-Sync DDC clock N.C. SPC-8520-LA, SPC-8521-LA... -
Page 27: Primary Ide Connector: Cni1
Slave mode by setting its jumper accordingly. Please refer to your hard disk documentation for the jumper setting. Table 3.9. Primary IDE Connector CNI1 Pin No. Function Pin No. Function RESET N.C. DREQ IORDY DACK Reserved Reserved HD ACT SPC-8520-LA , SPC-8521-LA... -
Page 28: Fan1 Connector: Cnj1
CNJ2 is a 3-pins box-header for the cooling fan power connector. The fan must be a 12V fan. Pin 3 is for Fan speed sensor input. Table 3.11. FAN2 Connector Pin No. Function CNJ2 POWER Housing : 5102-03 (molex) 1 2 3 Contact : 5103 (molex) SPC-8520-LA, SPC-8521-LA... -
Page 29: Lvds Lcd Panel Connector: Cnk1
LEDs integrated magnetic connector. The follow table shows the pin assignments of this connector. Table 3.13. 10/100BASE-TX LAN Connector Pin No. Function Pin No. Function CNL1 Speed Link / ACT N.C. N.C. N.C. N.C. Left LED: Speed LED 10M: OFF, 100M: Orange Right LED: Link/Ack LED Link: Green, Ack: Blink SPC-8520-LA , SPC-8521-LA... -
Page 30: Parallel Port Connector: Cnp1
Bi-Directional (PS/2 compatible) Bi-Directional EPP. A driver from the peripheral manufacturer is required for operation. Bi-Directional High-speed ECP Table 3.14. Parallel Port Connector CNP1 Pin No. Function Pin No. Function STROBE ERROR INIT SLCT IN BUSY SLCT N.C. SPC-8520-LA, SPC-8521-LA... -
Page 31: Keyboard / Mouse Connector: Cnq1
8 6 4 2 8 6 4 2 External Keyboard Connector: CNQ2 This is a 5-pin connector for external keyboard. Table 3.17. External Keyboard Connector Pin No. Function CNQ2 N.C. KB Data Housing: XHP-5(JST) Contact : SXH-001T-P06(JST) KBClock SPC-8520-LA , SPC-8521-LA... -
Page 32: Usb Connector: Cnu1, Cnu2
It is a 2 Pin connector used for external battery. An external battery power for used of Real-time clock and CMOS memory. Table 3.19. External Battery Connector Function CNW1 Pin No. External battery (3V) Housing: IL-2S-S3L-(N) (JAE) Contact: IL-C2-1-10000 (JAE) This product has the large capacity battery connected to this connector as standard. SPC-8520-LA, SPC-8521-LA... -
Page 33: Front Panel Connector: Cn1
External Speaker Speaker- N.C. ( E x . 8 Ω 0 . 2 5 W ) Speaker 9, 11, 13, 15 Power Button 1, 3 Reset Button 5, 7 HDD LED 2, 4 Power LED 8, 10, 12 SPC-8520-LA , SPC-8521-LA... -
Page 34: Cd-In Connector: Cn2
PSWIN : Connects a power push button switch and has the same function as CN2-1 pin (PowerBT). PS_ON : Output for ATX power-on/off control 5VSB : +5V voltage supplied from the ATX power in standby mode SPC-8520-LA, SPC-8521-LA... -
Page 35: External Power Connector (Only Spc-8521-La) : Cn6
This connector support only SPC-8521-LA. The supply of the power is possible from this connector in the case that it does not use the Back Plane. Table 3.23. External Power Connector Pin No. Function 4 3 2 1 Housing:VHR-4N(JST) Contact:SVH-21T-P1.1(JST) Vcc(+5V) Vcc(+5V) SPC-8520-LA , SPC-8521-LA... -
Page 36: Jumper Setting
4. Jumper Setting RS-422A/485 Terminator: JP1 Table 4.1. RS-422A/485 Terminator Terminator Function No terminating resister (Default) CTS for RS-422A Terminating resisiter provided Terminating resisiter provided RTS for RS-422A RXD for RS-422A/485 Terminating resisiter provided Terminating resisiter provided TXD for RS-422A/485 SPC-8520-LA, SPC-8521-LA... -
Page 37: Rs-232C/422A/485 Selector: Jp2/Jp3
The product uses the RTS signal and bit 1 in the modem control register to control transmit data. Modem control register (Setting I/O address +4H) bit 1: 0 … RTS High (Disables transmission) 1 … RTS low (Enables transmission) SPC-8520-LA , SPC-8521-LA... -
Page 38: Setting The Rs-422A/Rs-485 Receiver Disable Control Jumper
JP2: 5-6 120Ω JP1: 3-4 120Ω JP1: 1-2 Figure 4.1. RS-422A Setting RS-485 Setting RTS# SERIAL2 JP2: 7-8 DATA- TXD# 120 Ω JP1: 7-8 DATA+ JP2: 4-6 RXD# JP2: 5-6 120 Ω JP1: 5-6 Figure 4.2. RS-485 Setting SPC-8520-LA, SPC-8521-LA... -
Page 39: I/O Addresses And Instructions
Receiver buffer Register Divisor latch Register (LSB) Divisor latch Register (MSB) 02F9h Interrupt enable Register 02FAh Interrupt ID Register 02FBh Line control Register 02FCh Modem Control Register 02FDh Line status Register 02FEh Modem Status Register 02FFh Scratch Register SPC-8520-LA , SPC-8521-LA... -
Page 40: Clear Cmos Content: Jbat1
Return pin1 and pin2 connection (Normal Operation) after set the BIOS setup. Please connect pin 1 and pin 2 in the state of driving usually. Table 4.5. Clear ROM Content Function Normal Operation(Default) 3 2 1 Clear CMOS Content 3 2 1 SPC-8520-LA, SPC-8521-LA... - Page 41 4. Jumper Setting SPC-8520-LA , SPC-8521-LA...
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Page 42: Board Resources
100000h - Top of Main Memory Main DRAM Address Range Top of Main Memory Extended SMRAM Address Range Top of Main Memory To 4GB PCI Memory Address Range FEC00000h - FECFFFFFh, APIC configuration space FEE00000h - FEEFFFFFh FFFE0000h - FFFFFFFFh High BIOS Area SPC-8520-LA, SPC-8521-LA... - Page 43 5. Board Resources SPC-8520-LA , SPC-8521-LA...
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Page 44: Watch-Dog-Timer (Wdt) Setting
When performing the re-start of WDT, it repeats [WDT Start] and [WDT Stop]. Restart? It is also possible not to perform [WDT Stop] instead of performing [WDT Stop] to [WDT Start], but to perform [WDT Start] continuously at the time of a re-start. SPC-8520-LA, SPC-8521-LA... - Page 45 ;Activate logical device WDT(number 8) ;--------------------------------------------------- MOV DX,2EH MOV AL,30H OUT DX,AL MOV DX,2FH MOV AL,01H OUT DX,AL ;----------------------------------- ;Set timer unit : second ;----------------------------------- MOV DX,2EH MOV AL,F5H OUT DX,AL MOV DX,2FH MOV AL,00H OUT DX,AL SPC-8520-LA , SPC-8521-LA...
- Page 46 MOV AL,F6H OUT DX,AL MOV DX,2FH ;---------------------------------------------------------------------------------- ;The data of an example is 15 seconds.(01H=1sec.- FFH=255sec.) MOV AL,0FH ; 0FH = 15Sec. ;----------------------------------------------------------------------------------- OUT DX,AL ;----------------------------------- ;Exit the extended function mode ;----------------------------------- MOV DX,2EH MOV AL,AAH OUT DX,AL SPC-8520-LA, SPC-8521-LA...
- Page 47 MOV DX,2FH ;----------------------------------- ;The data of 00H is stop WDT MOV AL,00H ;----------------------------------- OUT DX,AL ;----------------------------------- ;Exit the extended function mode ;----------------------------------- MOV DX,2EH MOV AL,AAH OUT DX,AL CAUTION The timer’s intervals have a tolerance of ±2 seconds. SPC-8520-LA , SPC-8521-LA...
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Page 48: Bios Setup
Submenus: Exit Current page to the next higher level menu Move Enter Move to the item you desired PgUp key Increase the numeric value or make changes PgDn key Decrease the numeric value or make changes + key Increase the numeric value or make changes SPC-8520-LA, SPC-8521-LA... - Page 49 Even a seemingly small change to the chipset setup has the potential for causing you to use the override. A Final Note About Setup The information in this chapter is subject to change without notice. SPC-8520-LA , SPC-8521-LA...
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Page 50: Main Menu
Integrated Peripherals Use this menu to specify your settings for integrated peripherals. Power Management Setup Use this menu to specify your settings for power management. PnP / PCI Configuration This entry appears if your system supports PnP / PCI. SPC-8520-LA, SPC-8521-LA... -
Page 51: Standard Cmos Setup
The items in Standard CMOS Setup Menu are divided into 10 categories. Each category includes no, one or more than one setup items. Use the arrow keys to highlight the item and then use the <PgUp> or <PgDn> keys to select the value you want in each item. SPC-8520-LA , SPC-8521-LA... -
Page 52: Main Menu Selections
All, but Disk/Key Displays the amount of conventional Base Memory memory detected during boot up Displays the amount of extended Extended Memory memory detected during boot up Displays the total memory available in Total Memory the system SPC-8520-LA, SPC-8521-LA... -
Page 53: Ide Adapters
Set the “Precomp” value of this hard disk. Max = 65535 Min = 0 Landing zone Set the cylinder of “Landing zone” for this hard disk. Max = 65535 Min = 0 Sector Number of sectors per track Max = 255 SPC-8520-LA , SPC-8521-LA... -
Page 54: Advanced Bios Features Setup
Advanced BIOS Features Setup This section allows you to configure your system for basic operation. You have the opportunity to select the system’s default speed, boot-up sequence, keyboard operation, shadowing and security. Figure 7.3. Advanced BIOS Features Setup SPC-8520-LA, SPC-8521-LA... - Page 55 Use the default values under normal conditions. TM2 Bus Ratio Displays the frequency for when the Thermal Monitor 2 is selected. (The bus ratio for the throttle performance condition starts when the CPU sensor detects a high temperature.) SPC-8520-LA , SPC-8521-LA...
- Page 56 7. BIOS Setup Description Choice TM2 Bus VID Indicates the voltage for the throttle performance condition, which starts when a high temperature is detected. SPC-8520-LA, SPC-8521-LA...
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Page 57: Virus Warning
No warning message will appear when anything attempts to access the boot sector or Disabled hard disk partition table. Description Choice CPU L1 & L2 Cache Please use this setting by “Enabled”. Quick Power On Self Test Selecting Enabled can shorten the time required to execute POST (self-test upon power-up). SPC-8520-LA , SPC-8521-LA... - Page 58 Seeks disk drives during boot up. Disabling speeds boot up. Boot Up NumLock Status Toggle between On or Off to control the state of the NumLock key when the system boots. When toggled On, the numeric keypad generates numbers instead of controlling cursor operations. SPC-8520-LA, SPC-8521-LA...
- Page 59 System: The system will not boot and access to Setup will be denied if the correct password is not entered at the prompt. Setup: The system will boot, but access to Setup will be denied if the correct password is not entered at the prompt. SPC-8520-LA , SPC-8521-LA...
- Page 60 Report No FDD For Win 95 Select Yes to release IRQ6 when the system contains no floppy drive, for compatibility with Windows 95 logo certification. In the Integrated Peripherals screen, select Disabled for the Onboard FDC Controller field. SPC-8520-LA, SPC-8521-LA...
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Page 61: Advanced Chipset Features Setup
The value in this field depends on performance parameters of the installed memory chips (DRAM). Do not change the value from the factory setting unless you install new memory that has a different performance rating than the original DRAM SPC-8520-LA , SPC-8521-LA... - Page 62 RAS to accumulate its charge before DRAM refresh. If insufficient time is allowed, refresh may be incomplete and the DRAM may fail to retain data. Memory Frequency for If selecting the auto, it is defined by the BIOS. SPC-8520-LA, SPC-8521-LA...
- Page 63 The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select Enabled to support compliance with PCI specification version 2.1. Delay Prior to Thermal Select the interval to setup the delay timer for CPU Thermal-Throttling. SPC-8520-LA , SPC-8521-LA...
- Page 64 VGA function. On chip Frame buffer size Select the size of video memory assigned from the main memory. Boot Display To select display device. CRT: Analog RGB Display LFP: LVDS Display EFP: Not support (Please don’t setting) SPC-8520-LA, SPC-8521-LA...
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Page 65: Integrated Peripherals
7. BIOS Setup Description Choice Panel Number Select the LVDS panel device resolution. Integrated Peripherals Figure 7.6. Integrated Peripherals SPC-8520-LA , SPC-8521-LA... - Page 66 PIO mode (0-4) for each of the four IDE devices that the onboard IDE interface supports. Modes 0 through 4 provide successively increased performance. In Auto mode, the system automatically determines the best mode for each device. SPC-8520-LA, SPC-8521-LA...
- Page 67 Block mode is also called block transfer, multiple commands, or multiple sector read/write. If your IDE hard drive supports block mode (most new drives do), select Enabled for automatic detection of the optimal number of block read/writes per sector the drive can support. SPC-8520-LA , SPC-8521-LA...
- Page 68 Select Enabled to active the onboard LAN controller, select Disabled to turn-off the Internal LAN controller when you do not want to use this function USB Controller Select Enabled if your system contains a Universal Serial Bus (USB) controller and you have USB peripherals. SPC-8520-LA, SPC-8521-LA...
- Page 69 AC’97 Audio Select Auto to use the audio capabilities of your system. Init Display First Initialize the on-board video display before initializing any other display device on the system. Thus the AGP on-board display becomes the primary display. SPC-8520-LA , SPC-8521-LA...
- Page 70 Select Enabled if you use the onboard floppy disk controller (FDC). If you install and-in FDC or the system has no floppy drive, select Disabled in this field. Onboard Serial Port 1 Select an address and corresponding interrupt for the first serial port (SERIAL1). SPC-8520-LA, SPC-8521-LA...
- Page 71 Selected an operating mode for the onboard parallel port. Select Normal unless you are certain both your hardware and software support EPP or ECP mode. EPP Mode Select ECP Mode Use DMA Select a DMA channel for the port SPC-8520-LA , SPC-8521-LA...
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Page 72: Power Management Setup
The Power Management Setup allows you to configure you system to most effectively save energy while operating in a manner consistent with your own style of computer use Figure 7.10. Power Management Setup Description Choice Power-Supply Type Select the power supply type. SPC-8520-LA, SPC-8521-LA... - Page 73 This selection will cause the system to turn off the vertical and horizontal synchronization ports and write blanks to the video buffer. DPMS Initial display power management signaling. Video Off In Suspend Select whether the monitor is turned off or not at the time of suspend. SPC-8520-LA , SPC-8521-LA...
- Page 74 (On-state), when the ATX power is used. On: The ATX power will be turned on and the board will start up. Off: The ATX power will be turned off and the board will wait for input from the power push button (PowerBT). SPC-8520-LA, SPC-8521-LA...
- Page 75 When Enabled, your can set the date and time at which the RTC (real-time clock) alarm awakens the system from Suspend mode. Reload Global Timer Events: When Enabled, an event occurring on each listed device restarts the global timer for Standby mode. SPC-8520-LA , SPC-8521-LA...
- Page 76 7. BIOS Setup Description Choice SPC-8520-LA, SPC-8521-LA...
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Page 77: Pnp/Pci Configuration Setup
Normally, you leave this field Disabled. Select Enabled to reset Extended System Configuration Data (ESCD) when you exit Setup if you have installed a new add-on and the system reconfiguration has caused such a serious conflict that the operating system can not boot. SPC-8520-LA , SPC-8521-LA... - Page 78 (Such as IRQ4 for serial port 1) PCI/ISA PnP Devices compliant with the Plug and Play standard, whether designed for PCI or ISA bus architecture. The Choice: Legacy ISA and PCI/ISA PnP. PCI/VGA Palette Snoop Leave this field at Disabled. SPC-8520-LA, SPC-8521-LA...
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Page 79: Pc Health Status
Current CPUFAN1/2 Speed These fields display the current speed of connecting fan. These fields display the current voltage of input lines, if your computer Vcore / 1V05_Vccp/ +3.3V / +5V / 5VSB contains a monitoring system. SPC-8520-LA , SPC-8521-LA... -
Page 80: Frequency/Voltage Control
7. BIOS Setup Frequency/Voltage Control Figure 7.14. Frequency/Voltage Control Description Choices CPU Clock Ratio Use this field at Default. Spread Spectrum Use this field at Default. SPC-8520-LA, SPC-8521-LA... -
Page 81: Defaults Menu
(see Section 3). If the Security option is set to “System”, the password will be required both at boot and at entry to Setup. If set to “Setup”, prompting only occurs when trying to enter Setup. SPC-8520-LA , SPC-8521-LA... -
Page 82: Exit Selecting
BIOS cannot initialize the video screen to display any additional information. This beep code consists of a single long beep followed by two short beeps. The other code indicates that your DRAM error has occurred. This beep code consists of a single long beep repeatedly. SPC-8520-LA, SPC-8521-LA... -
Page 83: Error Messages
PLEASE RUN EISA CONFIGURATION UTILITY The slot configuration information stored in the EISA non-volatile memory is incomplete. Note: When either of these errors appear, the system will boot in ISA mode, which allows you to run the EISA Configuration Utility. SPC-8520-LA , SPC-8521-LA... - Page 84 In ISA mode enter Setup and enter the new memory size in the memory fields. Memory verify error at ... Indicates an error verifying a value already written to memory. Use the location along with your system's memory map to locate the bad chip. SPC-8520-LA, SPC-8521-LA...
- Page 85 NOTE: When this error appears, the system will boot in ISA mode, which allows you to run the EISA Configuration Utility. System halted, (CTRL-ALT-DEL) to REBOOT ... Indicates the present boot attempt has been aborted and the system must be rebooted. Press and hold down the CTRL and ALT keys and press DEL. SPC-8520-LA , SPC-8521-LA...
- Page 86 M/B burn in test. BIOS ROM checksum error - System halted The checksum of ROM address F0000H-FFFFFH is bad. Memory test fail BIOS reports the memory tests fail if the onboard memory is tested error. SPC-8520-LA, SPC-8521-LA...
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Page 87: Post Codes
Detect CPU information including brand, SMI type (Cyrix or Intel®) and CPU level (586 or 686). Reserved Reserved Initial interrupts vector table. If no special specified, all H/W interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR. Reserved Initial EARLY_PM_INIT switch. Reserved SPC-8520-LA , SPC-8521-LA... - Page 88 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Test 8254 Reserved Test 8259 interrupt mask bits for channel 1. Reserved Test 8259 interrupt mask bits for channel 2. Reserved Reserved Test 8259 functionality. Reserved SPC-8520-LA, SPC-8521-LA...
- Page 89 Program chipset registers according to items described in Setup & Auto-configuration table. Reserved Assign resources to all ISA PnP devices. Auto assign ports to onboard COM ports if the corresponding item in Setup is set to “AUTO”. SPC-8520-LA , SPC-8521-LA...
- Page 90 Set up ACPI table at top of memory. Invoke ISA adapter ROMs Assign IRQs to PCI devices Initialize APM Clear noise of IRQs. Reserved Reserved Reserved Reserved Reserved Reserved Reserved Read HDD boot sector information for Trend Anti-Virus code SPC-8520-LA, SPC-8521-LA...
- Page 91 Program daylight saving Update keyboard LED & typematic rate Build MP table Build & update ESCD Set CMOS century to 20h or 19h Load CMOS time into DOS timer tick Build MSIRQ routing table. Boot attempt (INT 19h) SPC-8520-LA , SPC-8521-LA...
- Page 92 3-9-31, Himesato, Nishiyodogawa-ku, Osaka 555-0025, Japan Japanese http://www.contec.co.jp/ English http://www.contec.com/ Chinese http://www.contec.com.cn/ No part of this document may be copied or reproduced in any form by any means without prior written consent of CONTEC CO., LTD. [04122007] [04142006] Management No. A-51-178 Parts No. [04122007_rev4]...