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iO1000 Detailed Service Manual - THEORY OF OPERATION
INT7/DTR/SCLK/
Figure 14. REDCAP Diagram
STDB
Baseband
CODEC
SRDB
Serial Port
SFSB(2)
BBP
Counter
SCKB(2)
STDA
Audio
CODEC
SRDA
Serial Port
SFSA(2)
SAP
DSP Timer
SCKA(2)
BRM
MOSI
MISO
QSPI
SCK
SPICS(5)
SIM(5)
SIM
ADRS(22)
DATA(16)
R/W
OE
EB0, EB1
External
Interface
CS(6)
Module
MOD
INT(6)
INT6/DRS/
STDA/TRST
SRDA/TMS
RST_OUT
RESET
RST_IN
Keypad
COLUMN(5)
Interface
ROW(5)
GPIO
REDCAP FUNCTIONAL BLOCK DIAGRAM
DSP
Core
MCU/DSP
Interface
MDI
MCU Int. Ctl
GPReg
Peripheral I/F Gaskat
PIG
MCU
Core
RAM (512 x 32)
ROM (4k x 32)
MCU Timers/PWM/
PIT/Watchdog
PRAM (512 x 24)
(24K x 24)
PROM (48K x 24)
(24K x 24)
DSP_IRQ
YROM 9Kx16
YRAM 8Kx16
XROM 9Kx16
XRAM 7Kx16
Shared X/MCU RAM1Kx16
CKIH,CKIL
Clocks/PLL
CKOH,CKO
Layer 1
TOUT(8)
Timer
MCU
DEBUG(6)
Debug
DSP_DE
JTAG(5)
JTAG/OnCE
MCU_DE
TEST
MUX_CTL
RTS/IC2A/
RESET_IN
CTS/MCU_DE
TX/TDO
RX/IC1/TDI
UART
29
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