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iDEN iO1000 Detailed Service Manual

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iO1000

Wireless Modem

Detailed Service Manual
68P02953C80-O
7 OCT 1999

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Summary of Contents for iDEN iO1000

  • Page 1: Wireless Modem

    ¤ iO1000 Wireless Modem Detailed Service Manual 68P02953C80-O 7 OCT 1999...

  • Page 2: Manual Revisions

    Trademarks The following is a registered trademark of Motorola, Inc.: ¥ iDEN ® Reg. U.S. Pat. & Tm. Off. All other trademarks mentioned in this manual are trademarks of their respective companies. Patent Information...

  • Page 3: Safety And General Information

    SAFETY AND GENERAL INFORMATION IMPORTANT INFORMATION ON SAFE AND EFFICIENT OPERATION. READ THIS INFORMATION BEFORE USING YOUR INTEGRATED MULTI-SERVICE RADIO PRODUCT. For the Safe and Efficient Operation of Your Radio, Observe these Guidelines: Antenna and Installation Considerations Your radio contains a transmitter and a receiver. When it is ON , it receives and transmits radio frequency •...

  • Page 4: Safety And General

    OPERATIONAL INTERFERENCE TO OTHER ELECTRONIC DEVICES WARNINGS W A R N I N G W A R N I N G RF energy may affect improperly installed or inadequately shielded electronic operating and entertainment systems in motor vehicles. Check with POTENTIALLY EXPLOSIVE ATMOSPHERES the manufacturer or representative to determine if these systems are adequately shielded from external...

  • Page 5: Cleaning Instructions

    OPERATIONAL OPERATIONAL CAUTION WARNINGS W A R N I N G C a u t i o n BLASTING CAPS AND AREAS DAMAGED ANTENNAS To avoid possible interference with blasting Do not use any radio product with a damaged antenna. operations, turn off your radio product when you are If a damaged antenna comes into contact with your near electrical blasting caps, in a blasting area, or in...

  • Page 6: Important Information

    FOR EVERY MANUFACTURER TO WHOM THESE It is important that any manufacturer to whom the PRODUCTS ARE RESOLD iO1000 modem is resold for use in the Final Product iO1000 modems that we are supplying to you for also recognize that he/she will have the responsibility incorporation into the final product are components...
  • Page 7 Detailed Service Manual - MODEL SPECIFICATIONS FOR F2581A MODEL SPECIFICATIONS FOR F2581A GENERAL RECEIVER TRANSMITTER FCC Designation: Receiver Type: RF Pulse Avg. Power: 0.6 W Temperature Range: Frequency Range: 851-866 MHz Frequency Range: Operating: –25°C to +60°C Bandwidth: 15 MHz...
  • Page 8 MODEL SPECIFICATIONS FOR F2581A viii...
  • Page 9 OVERVIEW INTRODUCTION The iO1000 Detailed Service Manual contains the information necessary to iden- tify and fix problems in the iO1000 OEM Module. This unit is based on digital technology and is designed to operate on integrated Digital-Enhanced Network (iDEN) systems.
  • Page 10 Frequency from Desired Channel Center (kHz) Figure 1. Spectrum of IDEN Quad 16QAM Time Division Multiple Access (TDMA) is used to allocate portions of the RF sig- nal by dividing time into six slots, one for each unit. Time allocation enables each unit to transmit its voice information without interference from another unit’s...
  • Page 11 Note that Rx (outbound) indicates base-to subscriber transmissions; Tx (inbound) indicates subscriber-to-base transmissions. The slots are paired and have a fixed offset of 19 milliseconds; their timings are synchronized by the iDEN system. The TDMA technique requires sophisticated algorithms and one digital-signal proces- sor (DSP) to perform voice compression/decompression and RF modulation/ demodulation.
  • Page 12 In current iDEN systems, outbound transmissions range from 851-866 MHz; inbound transmissions are 45 MHz lower in frequency. An iDEN channel is created by grouping bursts so that their slot numbers differ by a number referred to as the repetition rate. The portable uses two repetition rates for interconnect voice calls: 6:1 and 3:1.

  • Page 13: Theory Of Operation

    Detailed Service Manual - CHAPTER 2 CHAPTER 2 THEORY OF OPERATION This section provides a detailed theory of operation for the iO1000 OEM module and its components: the receiver, transmitter, frequency generation unit, logic unit, and the audio and data circuits.
  • Page 14 The RF board is connected to the Logic Board through a 60-pin connector. Fol- lowing are functions of the RF Board: 1. Transmit (0.6 watt) - iDEN modulation of the RF carrier with baseband data signal. 2. Receive - Demodulation of received RF signal to generate baseband signal 3.
  • Page 15 This section includes a quasi-linear class AB power amplifier (PA) for linear mod- ulation of the iDEN portables. When the unit is transmitting data, the digital data is sent to the DSP. When an audio is used, microphone audio is routed to the CODEC, where it is amplified and digitized by the A/D converter in the CODEC.
  • Page 16 THEORY OF OPERATION: Transmitter Path Section ADDAG to the ODCT. After receiving the data, the ODCT toggles the ASW line, which signals the ADDAG to turn on the PA and the antenna switch to start trans- mitting. ADDAG The ADDAG (Analog-to-Digital/Digital-to-Analog Glue logic) converts the serial I &...
  • Page 17 Detailed Service Manual - THEORY OF OPERATION BALUN The differential RF signal is converted to a traditional single-ended (unbalanced) signal through the balun (balanced/unbalanced) circuitry. The balun is imple- mented using multilayer ceramic technology. SAW Filter The signal is then routed to the SAW filter. The SAW filter further attenuates the residual image frequency and any out-of-band noise that may be present.
  • Page 18 Cartesian Feedback iDEN transmitters use MQAM modulation, which requires a highly linear PA with wide dynamic range. Linear PAs are highly inefficient so a class AB PA is used for better efficiency and longer battery life. The class AB PA is fairly linear, but not totally;...
  • Page 19 Detailed Service Manual - THEORY OF OPERATION ¥ Power amplifier ¥ Isolator ¥ Antenna switch The feedback path includes the following: ¥ Feedback inductor ¥ Attenuator ¥ ODCT ASIC Transmitter Output RF OUT ∑ ∑ Amplitude 0° & 90°...
  • Page 20 THEORY OF OPERATION: Transmitter Path Section Level Set and Phase Training Level set training is performed to ensure that the RF PA is not driven into clip, which would result in excess splatter and out-of-band spurious emissions. During training, the DSP signal is disconnected from the forward path and an internal analog ramp generator is connected.
  • Page 21 Figure 7. Phase Training Receiver Path Section The iO1000 receiver is a double-conversion, superheterodyne receiver (see Figure 8 on page 14). It operates in the commercial portion of the land-mobile receiver band (851-866 MHz). The receiver takes an incoming RF signal, down- converts it to a filtered109.65 MHz frequency (IF stage), and converts it to base...
  • Page 22 THEORY OF OPERATION: Receiver Path Section 16.8MHz REF from Fran-N Synthesizer From VCO Buffer Amp 1st LO Injection 960.65-975.65MHz 219.3MHz VCO 2nd LO Injection Antenna Switch Filter RF Input 0 or 10dB iZIF Filter Attenuator 851-866MHz 1st IF Filter Down Mixer 109.65MHz (Active) Crystal...
  • Page 23 Detailed Service Manual - THEORY OF OPERATION iZIF IC The iZIF IC performs the following functions: ¥ Implements AGC ¥ Down converts IF into baseband I and Q ¥ Synthesizes the second VCO frequency and TX offset oscillator ¥ Sends received data to the DSP through the ADDAG The iZIF takes the IF signal as its input, and outputs differential I and Q baseband signals as well as differential RSSI information.
  • Page 24 ¥ DSP phase locked loop (PLL) ¥ Host system clock synthesizer All frequencies in the iO1000 originate from the 16.8 MHz reference frequency provided by the Low Voltage Fractional-N synthesizer and the crystal-based refer- ence oscillator circuit. The UM5 crystal generates the 16.8 MHz signal, which is DC voltage-warped (or tuned) and temperature-compensated using the internal D/A converter in by the Low Voltage Fractional-N ASIC.
  • Page 25 Detailed Service Manual - THEORY OF OPERATION Pre-scaler Crystal 16.8MHz Tx and Rx Ref Osc LV Fractional - N Main VCO Buffer Circuit 16.8MHz 2.1MHz Synthesizer 956.9-975.65MHz (Discrete) Y300 (ASIC) (Discrete) Q305 U301 Q304 16.8MHz 109.65 x 2 iZIF...
  • Page 26 THEORY OF OPERATION: Frequency Generator (RF) Section LV Frac-N U301 Reference Loop 16.8MHz Phase Detect Oscillator Filter Y300, D300 Q302 Q304, D301, SF-FGU L304 Loop Divider 956.9 to 979.65MHz Aux3 Regulated vmult1 VCP Supply Prescaler Discrete CR301/CR302/ Buffer vmult2 Q301 956.9 to Q305 979.65MHz...
  • Page 27 Detailed Service Manual - THEORY OF OPERATION Main VCO Synthesizer This synthesizer consists of the crystal-based reference oscillator, Low Voltage Fractional ASIC, and main VCO circuit. It produces the RF signal to down-con- vert the received signal to the first IF frequency (109.65 MHz) and up-convert the transmitter IF frequency (150.9 MHz) to the transmit RF frequency.
  • Page 28 THEORY OF OPERATION: Frequency Generator (RF) Section ADDAG ASIC The ADDAG is an acronym for A/D + D/A + Glue. The ADDAG IC is designed to be an interface between the system DSP, which is digital, and the custom transmit- ter and receiver ICs, which are primarily analog.
  • Page 29 Detailed Service Manual - THEORY OF OPERATION ODCT ASIC Offset VCO The offset VCO is a discrete VCO that is controlled by the offset synthesizer in the iZIF. The frequency of the offset VCO is 301.8 MHz which is divided by two to 150.9 MHz in the ODCT and mixed with the main VCO to generate the transmit...
  • Page 30 THEORY OF OPERATION: Global Control Audio Power II (GCAP II) Circuitry ¥ 8-bit D/A converter ¥ 10-channel, 8-bit A/D converter ¥ Square-wave output to generate negative supply voltages ¥ Control logic ¥ Audio CODEC with serial interface ¥ Earpiece amplifier ¥...
  • Page 31 3.6Vdc, and high-level voltage of 4.2Vdc The DC voltage distribution of the iO1000 radio is supported by the GCAP II IC (Figure 11 on page 24). This IC supplies regulated power to the radio using its lin- ear requlators, V1, V2, and V3.
  • Page 32 THEORY OF OPERATION: Audio Circuitry RAW_B+ GCAP II Clock Buffers, Low Vcc5 LINEAR REG. V2; Volt. Comparator 2.775V, 200mA FLASH, SRAM GCAP II Fuse LINEAR REG. V1; Vcc4 Ext. Memory Bus, 2.775V, 60mA Fused_B+ SPI and ESSI Ports GCAP II Filt_B+ Vcc3 REDCAP...
  • Page 33 From this point, the audio signal is sent to the GCAP II output ampli-fier A4 - the external audio output. Figure 4 indicates the circuitry path of the audio components. The iO1000 accepts audio input from the external microphone and sends the received audio to the external audio output. MCORE ESSI1 Ext.
  • Page 34 THEORY OF OPERATION: Digital Section Audio Amplifier Outputs The following table lists the audio amplifier outputs and the devices that each out- put controls. Table 1. Audio Amplifier Outputs Device Outputs Not used Not used Not used External microphone Externl audio out Digital Section This section includes the REDCAP, which controls the transmit, receive, and syn- thesize operations of the integrated circuits located in the RF section.
  • Page 35 Detailed Service Manual - THEORY OF OPERATION REDCAP GCAP II U801 U001 CODEC Integrated Audio TIMER and DC Voltage Converter/Regulator REGULATED P. SUPPLY L1 Timer Chip Selects QSPI SPI Bus UNREGULATED RS232/SB9600 P. SUPPLY TIMER UART E I M...
  • Page 36 THEORY OF OPERATION: Digital Section ¥ 512 KB x 32 on-chip MCU RAM ¥ 512 KB x 24 DSP program RAM ¥ Queued serial peripheral interface to communicate with external peripherals ¥ Serial communications interface with baud-rate generator up to 525 kbps ¥...
  • Page 37 Detailed Service Manual - THEORY OF OPERATION REDCAP FUNCTIONAL BLOCK DIAGRAM STDB Baseband PRAM (512 x 24) (24K x 24) CODEC SRDB Serial Port PROM (48K x 24) (24K x 24) SFSB(2) DSP_IRQ Counter SCKB(2) YROM 9Kx16 Core STDA...
  • Page 38 THEORY OF OPERATION: Digital Section The REDCAP performs the following tasks: ¥ Controls the power up and power down sequence of the unit ¥ Programs the flash using BDM or SB9600 software ¥ Transfers DSP code from the flash to DSP SRAM ¥...
  • Page 39 Detailed Service Manual - THEORY OF OPERATION REDCAP Digital Signal Processor (DSP) TThe REDCAP SPS 56600 digital signal processor (DSP) contains the new DSP Engine Ultralite core, which is capable of executing an instruction on every clock cycle. The DSP56600 consists of the following:...
  • Page 40 THEORY OF OPERATION: Digital Section Host Memories The following types of host memories are available: 1MB x 16 chip. The flash stores unit subscriber and Flash memory DSP code. To access the flash, the RCE asserts CS0 and OE low, and then drives EB1 high for reads. For a write, OE is held high, CS0 and EB1 and driven low.
  • Page 41 Detailed Service Manual - THEORY OF OPERATION DSP Phase Locked Loop (PLL) The DSP phase locked loop (PLL) is programmable and is used to generate a DSP internal clock that is synchronized to the 16.8 MHz reference frequency. In low power mode, the DSP PLL is disabled and the DSP operates directly from the 16.8 MHz clock.
  • Page 42 THEORY OF OPERATION: Digital Section IDEN OEM Accessory Connector Interface (J4) Table 15. Accesory Connector Pin Functions PIN N0 PIN NAME DIRECTION DESCRIPTION RS232_RX RS232 Signal RS232_TX RS232 Signal RS232_DTR RS232 Signal RS232_DCD RS232 Signal RS232_GND Signal Ground RS232_RTS RS232 Signal...

This manual is also suitable for:

F2581a