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iO1000 Detailed Service Manual - THEORY OF OPERATION
DSP
RAM
ROM
MDI
RAM
ROM
MCU
TIMER
CS0
ADDRESS
BUS
FLASH
U802
Figure 13. Digital Block Diagram
REDCAP
The REDCAP IC (U801) integrates a reduced instruction-set computer (RISC)
microprocessor (MCU) and a general-purpose Digital Signal Processor (DSP) on
a single chip (Figure 14 on page 29).
The following is a summary of the REDCAP IC key features:
¥ RISC integer processor running up to 16.8 MHz at 1.8Vdc, a 32-bit RISC archi-
¥ SPS 56600 NDE-UL DSP core running up to 58.8 MHz at 1.8Vdc
¥ Fully-programmable PLL for system clock generation with low-output clock
REDCAP
U801
SAP
TIMER
BBP
L1 Timer
Chip Selects
QSPI
SPI Bus
RS232/SB9600
UART
CS2
E I M
DATA BUS
SRAM
U803
tecture, high performance and high code density
drivers
GCAP II
U001
PCM
CODEC
Integrated Audio
and DC Voltage
Converter/Regulator
EXTERNAL
POWER
SUPPLY
30 pin ZIF CONNECTOR J4
REGULATED
P. SUPPLY
UNREGULATED
P. SUPPLY
TO TRANSCEIVER
(RF BOARD)
EXTERNAL
AUDIO
27
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