TENX TECHNOLOGY TM57PA40 User Manual

8 bit microcontroller

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Information
TM57PA20/
TM57PA40
8 Bit Microcontroller
User Manual
Tenx reserves the right to change or
discontinue this product without notice.
tenx technology inc.
tenx technology, inc.
Preliminary
Rev 1.3, 2009/10/19

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Summary of Contents for TENX TECHNOLOGY TM57PA40

  • Page 1 Advance Information TM57PA20/ TM57PA40 8 Bit Microcontroller User Manual Tenx reserves the right to change or discontinue this product without notice. tenx technology inc. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 2 1. Absolute Maximum Ratings ..................39 2. DC Characteristics..................... 39 3. Clock Timing ......................40 4. Reset Timing Characteristics ..................40 5. LVR Circuit Characteristics ..................40 6. ADC Electrical Characteristics ................... 40 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 3   20-SSOP Package Dimension ................... 44   16-DIP Package Dimension ..................45   16-SOP Package Dimension..................46   16-SSOP Package Dimension ................... 47   8-DIP Package Dimension ..................48   8-SOP Package Dimension..................49 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 4: Features

    Interrupts: Three pin interrupts, Timer0/Timer1 interrupt and Wakeup Timer interrupt Power Down mode support Package Types: 8 DIP/SOP, 16 DIP/SOP/SSOP, 20 DIP/SOP/SSOP DEVICE OTP ROM TTP™ function Note TM57PA40 4K x 14 bits Available TM57PA20 2K x 14 bits Not Available tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 5: Block Diagram

    PD6/ADC6/TCOUT Xrc/Xin/PA4 TM57PA20 PA6/ADC0/INT0 Xout/PA3 TM57PA40 PA1/ADC1/INT1 VPP/nRESET/ INT2/PA7 16 SOP PA2/ADC2/T0I T1OUT/PD0 16 DIP PB1/ADC3 BUZZER/PD1 16 SSOP PD7/ADC4 PA5/ADC5 PA0/PWM0 Xrc/Xin/PA4 TM57PA20 PA1/ADC1/INT1 Xout/PA3 TM57PA40 PA2/ADC2/T0I VPP/nRESET/ INT2/PA7 8 SOP/DIP PA0/PWM0 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 6 BUZZER output Instruction cycle clock divided by N output. Where N is 1,2,4,8. The instruction TCOUT clock frequency is system clock frequency divided by two. PWM0/PWM1 10-bit PWM output ADC7~0 A/D converter input tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 7: Functional Description

    F-Plane is bit-addressable, while the second half of F-Plane is not bit-addressable. R-Plane F-Plane Bit Addressable MOVWR Instruction Write Only Bit Addressable RAMBANK=0 RAMBANK=1 Bit Addressable Bit Addressable RAMBANK=0 RAMBANK=1 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 8: Programming Counter (Pc) And Stack

    C: Carry Flag or Borrow Flag ADD instruction SUB instruction 1: a carry occurred from the MSB 1: no borrow 0: no carry 0: a borrow occurred from the MSB tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 9: Interrupt

    The interrupt event is level trigged. F/W must clear the interrupt event register while serves the interrupt routine. Interrupt Source Interrupt Pending Interrupt i-Flag Vector Interrupt Enable tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 10: Chip Operation Mode

    XRESETE: External pin Reset Enable Enable External pin Reset Disable External pin Reset WDTE: WDT Reset Enable Enable WDT Reset, Disable WKT Timer Disable WDT Reset, Enable WKT Timer IRCF: Internal RC Frequency adjustment control tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 11: Prom Re-Use

    2.3 PROM Re-use The PROM size of TM57PA40 is 4K words. For some F/W program, the program size could be less than 2K words. To fully utilize the PROM, the device allows users to reuse the PROM. This feature is named as Two Time Programmable (TTP) ROM.
  • Page 12: Peripheral Functional Block

    (WDTE=1), the WDT generates the chip reset signal, even in sleep mode, otherwise, the WKT only generates overflow time out interrupt. If WDTE=0 and WKTIE=0 (Wakeup interrupt disable), the internal RC Timer stops for power saving. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 13: Timer0: 8-Bit Timer/Counter With Pre-Scale (Psc)

    T0I input. The Timer0 increase rate is determined by “Timer0 Pre- Scale” (TM0PSC) register in R-Plane. The Timer0 can generate interrupt (TM0I) when it rolls over. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 14: Timer1: 8-Bit Timer With Pre-Scale (Psc)

    The Timer1 increase rate is determined by “Timer1 Pre- Scale” (TM1PSC) register in R-Plane. The Timer1 can generate interrupt (TM1I) and T1OUT toggle signal when it rolls over. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 15 8-bit MSB of PWM duty register (PWMDUTY). When the base counter rolls over, the 2-bit LSB of PWM duty register decide whether to set the PWM output signal high immediately or set it high after one clock cycle delay. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 16 Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller PWM example code: movlw 01111111b movwf ;set PWM0DUTY[9:2]=8’b01111111 movlw 11000000b movwf ;set PWM0DUTY[1:0]=2’b11 movlw 01000000b movwr ;enable PWM0 output to PA0 (PWM0_OUT) movlw movwr ;disable PWM0 (PWM0_OUT) tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 17: Bit Adc

    ADC example code: movlw 00000111b movwf ;ADC channel select,ADC7(PB0) (ADCSEL) movlw 00000001h movwr ;disable PB0 pull up resistor (nPBPU) movlw 01111111b tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 18 ;set ADC7 input enable (nADC_IE) movlw 00010000b movwr ;set ADC clock is instruction cycle / 64 (ADCCLKS) 11h,3 ;start ADC conversion (ADCSTART) ADC_LOOP: btfsc 11h,3 goto ADC_LOOP ;wait ADCSTART go LOW ;read ADCQ[11:0] (ADCDQ) tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 19: System Clock Oscillator

    In external RC mode, the external resistor and capacitor determine the oscillation frequency. In the internal RC mode, the on chip oscillator generates 4MHz system clock. External Oscillator Circuit External RC Oscillator (Crystal or Ceramic) tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 20: Buzzer Output

    /2) / (Instruction Cycle Divider) / (BUZ_PROD +1) Output frequency calculation CPU Clock (fosc) = 8192KHz Instruction Cycle = fosc/2 = 8192KHz/2 = 4096KHz Prescaler Ratio (BUZ_PSC) = 2’b11 (Instruction Cycle Divider = 32) Period Data (BUZ_PROD) = 9 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 21 10000000b movwr ; enable BUZZER output to PD1 (BUZ_OUT) movlw 11001001b ; (fosc/2)/32 (BUZ_PSC) movwr ; Period=9 (BUZ_PROD) movlw movwr ; enable BUZZER counting (BUZ_EN) movlw movwr ; disable BUZZER counting (BUZ_EN) tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 22: I/O Port

    BSF, BCF and all instructions using F-Plane as destination. nPAPU DATA Write WR_nPAPU WR_PAE SYS_RESETn Port Delay Pre-Driver 1 CLK WR_PAD DATA Read RD_PAD Read_Modify_Write PA0-2, nPAPU=0 Drive Drive Drive Drive Drive Drive 1 CLK tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 23: Pa3-6, Pb0-1, Pd0-7

    PA3-6, nPAPU=0 Drive Drive Drive Drive Drive 4.3 PA7 PA7 can be only used in Schmitt-trigger input mode. The pull-up resistor is always connected to this pin. tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 24: Memory Map

    - ADC conversion result ADCQ[11:4] ADCDQ 11.7~4 - ADC conversion result ADCQ[3:0] - H/W clear this bit after ADC end of conversion ADCSTART 11.3 0 S/W set this bit to start ADC conversion tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 25 UM-TM57PA20&40_E 8 Bit Microcontroller ADCSEL 11.2~0 0 ADC channel select; 0:ADC0, 1:ADC1,…,7:ADC7 20~27 - Internal RAM – Common Area 28~7F - Internal RAM – RAM Bank0 28~7F - Internal RAM – RAM Bank1 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 26: R-Plane

    1: the pin pull up resistor is disable 0: disable BUZZER output to PD1 pin BUZ_OUT 0b.7 1: enable BUZZER output to PD1 pin 0: disable PWM0 output to PA0 pin PWM0_OUT 0b.6 1: enable PWM0 output to PA0 pin tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 27 0 Test mode register, for manufacturer only, user do not write it Each bit controls its corresponding ADC7~0 enable pin, if the bit is nADC_IE 12.7~0 0: the corresponding pin is ADC input 1: the corresponding pin is digital input tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 28: Instruction Set

    1 : Register file Working Register Zero Flag Carry Flag Decimal Carry Flag Program Counter Top Of Stack Global Interrupt Enable Flag (i-Flag) Option Field Contents Bit Field Before After ← Assign direction tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 29 RETLW 01 1000 kkkk kkkk Return with Literal in W Go into standby mode, Clock SLEEP 00 0000 0000 0011 TO,PD oscillation stops XORLW 01 1111 kkkk kkkk XOR Literal "k" with W tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 30 If ’d’ is 1, the result is stored back in register ’f’. Cycle Example ANDWF FSR, 1 B : W = 0x17, FSR = 0xC2 A : W = 0x17, FSR = 0x02 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 31 2nd cycle instruction. Cycle Example LABEL1 BTFSS FLAG, 1 B : PC = LABEL1 TRUE GOTO SUB1 A : if FLAG.1 = 0, PC = TRUE FALSE ... if FLAG.1 = 1, PC = FALSE tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 32 WDT/WKT Timer ← 00h Status Affected TO, PD OP-Code 00 0000 0000 0100 Description CLRWDT instruction clears the Watchdog/Wakeup Timer Cycle Example CLRWDT B : WDT counter = ? A : WDT counter = 0x00 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 33 GOTO is an unconditional branch. The 12-bit immediate value is loaded into PC bits <11:0>. GOTO is a two-cycle instruction. Cycle Example LABEL1 GOTO SUB1 B : PC = LABEL1 A : PC = SUB1 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 34 W register. If ’d’ is 1, the result is placed back in register ’f’. Cycle Example IORWF RESULT, 0 B : RESULT = 0x13, W = 0x91 A : RESULT = 0x13, W = 0x93, Z = 0 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 35 00 0000 00rr rrrr Description Move data from W register to register ‘r’. Cycle Example MOVWR REG1 B : REG1 = 0xFF, W = 0x4F A : REG1 = 0x4F, W = 0x4F tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 36 Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two-cycle instruction. Cycle Example RETURN A : PC = TOS tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 37 SLEEP Go into standby mode, Clock oscillation stops Syntax SLEEP Operands Operation Status Affected TO, PD OP-Code 00 0000 0000 0011 Description Go into SLEEP mode with the oscillator stopped. Cycle Example SLEEP tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 38 If the content of register ‘f’ is 0, Zero flag is set to 1. Cycle Example TESTZ REG1 B : REG1 = 0, Z = ? A : REG1 = 0, Z = 1 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 39 W register. If ‘d’ is 1, the result is stored back in register ‘f’. Cycle Example XORWF REG 1 B : REG = 0xAF, W = 0xB5 A : REG = 0x1A, W = 0xB5 tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 40: Electrical Characteristics

    System Clock > LVR – = 3 V Frequency = 2.2 V = 0 V = 5 V Ports A/B/D = 3 V Pull-Up Resistor = 0 V = 5 V = 3 V tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 41: Clock Timing

    = 5.12 V, V = 0 V – ± 3.2 ± 5 Integral Non-Linearity – Max Input Clock (f – – – μs Conversion Time = 2 MHz – – Input Voltage – – tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 42 Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 43: Packaging Information

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller PACKAGING INFORMATION The order information: “IC Type” “XX” “YY” “C” “Z”. 1. “IC TYPE”: TM57PA20 / TM57PA40 2. “XX”: Package Type • DIP Code: D • SOP Code: S • SSOP Code: SS 3. “YY”: IC Pin Number •...
  • Page 44: Sop Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 20-SOP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 45: Ssop Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 20-SSOP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 46: Dip Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 16-DIP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 47: Sop Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 16-SOP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 48: Ssop Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 16-SSOP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 49: Dip Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 8-DIP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...
  • Page 50: Sop Package Dimension

    Advance Information UM-TM57PA20&40_E 8 Bit Microcontroller 8-SOP Package Dimension tenx technology, inc. Preliminary Rev 1.3, 2009/10/19...

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