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APPOTECH AX2228D User Manual

Audio player microcontroller
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AX2228D
Audio Player Microcontroller
User Manual
[AX2228D -UM-EN]
Versions: 1.0.0
Release Date: 2015-9-2

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Summary of Contents for APPOTECH AX2228D

  • Page 1 AX2228D Audio Player Microcontroller User Manual [AX2228D -UM-EN] Versions: 1.0.0 Release Date: 2015-9-2...

  • Page 2: Table Of Contents

    Interrupt sources ......................13 3.4.2 Interrupt Priority....................... 15 CPU and Memory related SFR Description ................15 Reset Generation ..........................23 Power-on Reset (POR) ......................23 System Reset ..........................23 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 3 7.1.1 Timer0 Features ........................ 58 7.1.2 Timer0 Special Function Registers ..................58 Timer1 ............................59 7.2.1 Timer1 Features ........................ 60 7.2.2 Timer1 Special Function Registers ..................60 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 4 UART1 Operation Guide ....................84 UART2 ............................84 8.3.1 Overview ........................... 84 8.3.2 UART2 Special Function Registers ..................84 Operation Guide ........................88 SPI ..............................90 SPI0 ............................90 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 5 Slave mode 3 ........................114 13.3.5 IIS Operation Flow ......................115 14 LCD driver ............................116 Features ..........................116 14.1 LCD Function Control Registers ....................118 14.2 15 Characteristics ..........................123 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 6: Figure

    Figure 9-1 SPI timing ............................90 Figure 10-1 EMI timing ............................97 Figure 22-1 Timing of IIS in different mode ...................... 111 Figure 16-1 AX2228D LQFP48 package dimensions ..................125 Table Table 2-1 LQFP48 pin description ........................3 Table 3-1 AXC51-CORE Instruction Set Summary ....................8 Table 3-2 Interrupt Summary ..........................

  • Page 7: Register

    Register 3-15 IP1 – Interrupt Priority 1 ......................21 Register 4-1 LVDCON– LVD control ........................25 Register 4-2 PCON0 – Power control 0 ......................26 Register 4-3 PCON1 – Power control 1 ......................27 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 8 Register 6-14 P0PD0 – P0 pull-down resistor control ..................47 Register 6-15 P1PD0 – P1 10KΩ pull-down resistor control ................47 Register 6-16 P2PD0 – P2 3.3KΩ pull-down resistor control ................47 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 9 Register 7-16 TMR3CNT – Timer3 Counter ...................... 65 Register 7-17 TMR3PR – Timer3 Period ......................65 Register 7-18 TMR3PWM – Timer3 PWM duty ....................66 Register 7-19 WDTCON – Watchdog control ....................66 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 10 Register 14-2 SPI0BAUD – SPI0 Baud Rate ..................... 91 Register 14-3 SPI0BUF – SPI0 Data Buffer ...................... 92 Register 14-4 SPI0DMACNT – SPI0 DMA counter .................... 92 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 11 Register 19-3 ADCBAUD– SARADC baud rate control ................... 108 Register 19-4 ADCDATAL– SARADC Buffer low byte control ................. 109 Register 19-5 Register 21-4 ADCDATAH– SARADC Buffer high byte control ..........109 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 12 Register 23-11 LCD_COM3H - Segment data high byte for LCDCOM3 ............121 Register 23-12 LCD_COM4L - Segment data low byte for LCDCOM4............121 Register 23-13 LCD_COM4H - Segment data high byte for LCDCOM4 ............121 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 13: Product Overview

    Independent powered RTCC;  48MHz PLL-based clock generator;  Nine Channels 10-bit SARADC;  Power on Reset.  Operating temperature: -25℃ to +85℃;  Storage temperature: -65℃ to +150℃. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 14: System Architecture

    MP3 encoder Timer0,1,2,3 Huffman UART0,1 AX2228D DMA arbiter Memory CORE Port0,1,2,3 (Host/Device) WMA decoder Clock managment RTCC driver External OSC Internal RC Watchdog Figure 1-1 AX2228D system architecture AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 15: Pin Definitions

    DACL VDDCORE VSSDAC DVSS Figure 2-2 Pin assignment for LQFP48 2.1.3 Pin Descriptions Table 2-1 shows the pin descriptions of LQFP48 package. Table 2-1 LQFP48 pin description AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 16 DAC Bandgap voltage reference DACL DAC Left Channel VSSDAC DAC Ground MICIN1 VCMBUF AUXL2 MICIN0 AUXR2 AUXR0 SDDAT2 UART0TX1 GPIO AUXL0 SPI0DI2 SDDAT1 UART0RX1 GPIO PWM3 CAP3 SDDAT3 SPI0DODI2 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 17 GPIO ADC1 SPI1DI1 TMR1 TMR0 SPI0DI1 GPIO INT3 CAP1 GPIO ADC6 PWM2 IISREFCLK AMIN CAP2 UART0TX0 GPIO TMR2 IISWS GPIO DVSS Digital Ground VDDCORE Digital 1.8V Power AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 18 SPI1DODI0 SDDAT01 GPIO SPI1DI0 SDCMD1 GPIO ADC4 SPI1CLK0 SDCLK1 GPIO INT2 PWM0 SPI0CLK2 UART0RX0 GPIO EMID6 SPI0CLK0 GPIO EMID5 SPI0DO3 SPI0DI0 GPIO EMID4 IISDO1 GPIO EMID3 IISDI1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 19 USBDM USB Negative Input/output USBDP USB Positive Input/output UDSW GPIO I: input; O: output; PWR: power; GND: ground; AO: Analog Output; AI： Analog Input； NC: not connect AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 20: Cpu Core Information

    3.1 Architecture CPU Core Information 3.1 Architecture The AXC51-CORE of AX2228D is fully compatible with the MCS-51 instruction set. The AXC51-CORE employs a pipelined architecture that greatly increases its instruction throughput over the standard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system clock cycles to execute, and usually have a maximum system clock of 12MHz.
  • Page 21 1 or 3 C, bit addr @A+DPTR A, #data data addr, #data @Ri, #data Rn, #data SJMP code addr C, bit addr MOVC* A, @A+PC data addr, data addr AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 22 1 or 3 XCHD A, @Ri DJNZ Rn, code addr 1 or 3 MOVX A, @DPTR MOVX A, @Ri A, data addr A, @Ri AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 23: Memory Mapping

    A @Ri, A Rn, A 3.3 Memory Mapping 3.3.1 Program Memory Mapping As illustrated in Figure 3-1, AX2228D program include 16KB IRAM at the address form 0x0000 to 0x3FFF. 0xFFFF Reserved 0x8000 0x7FFF 32K OTP 0x0000 CODE Space...

  • Page 24: External Data Memory Mapping

    Figure 3-3. The memory space is shown divided into three blocks, which are generally referred to as the Lower 128, the Upper 128, and SFR space. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 25: Interrupt Processing

    Setting EA to logic 0 disables all interrupts regardless of the individual interrupt-enable settings. The interrupt enables and priorities are functionally identical to those of the 80C52. The AX2228D provides 1 set of vectors entry addresses, starting from 0x0003. The vector base address is set by DPCON [7:6].
  • Page 26 IP1.4 IPH1.5 Timer 0 0x0063 TMR0CON.7 IE1.5 IP1.5 RTCC RTCON.7 UART0 UARTSTA.5&UARTSTA.4 UART1 UART1STA.3&UART1STA2 IPH1.6 0x006B IE1.6 IP0.7 IP1.6 LVDCON.7 IIS_CON1.7 IPH1.7 SPI1 0x0073 SPI1CON.7 IE1.7 IP1.7 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 27: Interrupt Priority

    0 = DPSEL toggle disable 1 = DPSEL toggle enable EINSTEN: Extern instruction enables 0 = Disable 1 = Enable DPSEL: DPTR Select 0 = Active DPTR0 1 = Active DPTR1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 28: Register 3-2 Dpl0 – Data Pointer Low Byte

    DPTR. The AX2228D offers a programmable option that allows any instructions related to data pointer to toggle the DPSEL bit automatically. This option is enabled by setting the toggle-select-enable bit (DPTSL) to logic 1.

  • Page 29: Register 3-6 Sp – Stack Pointer Low Byte

    In a standard 8051, there is only an 8-bit stack pointer (SP). It can only use the internal 256 byte data memory as stack memory. To increase the stack space for more complex application, AX2228D supports a 16-bit extend stack pointer, it can use both internal data RAM and the 20K byte on-chip SRAM as stack memory.

  • Page 30: Register 3-9 Spmode – Special Mode

    IE04: MP3 decoder and encoder interrupt enable 0 = Disable 1 = Enable IE03: Timer2 interrupt enable 0 = Disable 1 = Enable IE02: Timer1 interrupt enable 0 = Disable AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 31: Register 3-11 Ie1 – Interrupt Enable 1

    IE11: SDC interrupt enable 0 = Disable 1 = Enable IE10: USB control interrupt enable 0 = Disable 1 = Enable Register 3-12 IPH0 – Interrupt Priority high 0 Position AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 32: Register 3-13 Ip0 – Interrupt Priority 0

    IPH02, IP02: Timer1 interrupt priority 11 = level 3 highest priority 10 = level 2 01 = level 1 00 = level 0 lowest priority IPH01, IP01: SINT1 interrupt priority AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 33: Register 3-14 Iph1 – Interrupt Priority High 1

    01 = level 1 00 = level 0 lowest priority IPH14, IP14: Timer 3 interrupts priority 11 = level 3 highest priority 10 = level 2 01 = level 1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 34 00 = level 0 lowest priority IPH10, IP10: USB control interrupts priority 11 = level 3 highest priority 10 = level 2 01 = level 1 00 = level 0 lowest priority AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 35: Reset Generation

    Sometimes, when the VDD is power-off and quickly power-on again, there might be cases that the POR will work improperly and internal reset might not be generated. For this reason, AX2228D POR circuit incorporates an internal self-reset module to discharge PORB output during power-off to ensure each power cycle will work properly.

  • Page 36: Lvd

    Low-Drop-Out regulator (LDO) and that supplies power to internal VDDCORE. User for such reason can momentarily monitor the VDDLDO power if externally connects to some batteries and detect if external power source starts dropping to a level that AX2228D LDO cannot tolerate and can do proper actions in the system program.

  • Page 37: Register 4-1 Lvdcon– Lvd Control

    VD1_EN: VDDLDO voltage enable bit. Low active 0 = VDDLDO voltage detection is enabled 1 = VDDLDO voltage detection is disabled LVDS: Voltage detection level select 00 = 2.2V/1.8V AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 38: Rtcc Reset

    11 = 3.1V/2.5V 4.2.2 RTCC Reset AX2228D can be reset by RTCC second and alarm interrupt when IRTRSTEN bit in RTCON is set to 1. 4.2.3 Watchdog Reset If Watchdog timer is enabled, and WDTCON [5] is not written by 1 within watchdog overflow time period, AX2228D will be reset by Watchdog overflow.

  • Page 39: Register 4-3 Pcon1 – Power Control 1

    UARTCEN: UART clock enable 0 = Enable 1 = Disable SDCCEN: SDC clock enable 0 = Enable 1 = Disable WMACEN: WMA Decode clock enable 0 = Enable AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 40: Register 4-4 Pcon2 - Power Control 2

    ADCCEN: ADC clock enable 0 = Enable 1 = Disable Register 4-5 PCON3 – Power control 3 Position Name IISREFCSEL OTP2ICEN BASSCEN AUALUEN FMAMCEN AGCEN RCEN ISPCEN Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 41: Register 4-6 Clkcon - Clock Control

    00 = RC 512K 01 = RC 32K 10 = RC 6M 11 = RC 12M WDTCSEL: WDT clock section 0 = Internal 32 KHz RC oscillator output AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 42: Register 4-7 Clkcon1 - Clock Control 1

    1 = Select external 12MHz crystal oscillator DECDIV: Decoder clock divide 2 from system clock 0 = Disable 1 = Enable SYSDIV: System clock divide from clock source AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 43: Register 4-8 Clkcon2 - Clock Control 2

    10 = External 32 KHz or 12MHz crystal oscillator controlled by CLKCON2 [6] and CLKCON2 [7] as shown in F igure 11 = 1MHz when XOSC is 12M AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 44: Phase Lock Loop (Pll)

    4.3.2 Phase Lock Loop (PLL) AX2228D provides one on-chip Phase Locked Loop (PLL 48M) clock generators. The PLL has reference clock from external 32 KHz/4M/12 M crystal oscillators to provide a stable reference clock and the reference clock is multiplied to provide the final PLL output.

  • Page 45: Register 4-10 Pllcon2 - Pll Configuration2

    1 = Enable Register 4-11 PLLINTH – PLL integer high Position Name OFFSET FREQ INTH Default Access Offset: frequency offset 000 = 2500ppm 001 = 5000ppm 010 = 10000ppm AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 46: Register 4-12 Pllintl - Pll Integer Low

    If f0=12M, frequency dividing ratio is 5, decimal fraction part set 0. If f0=4M, frequency dividing ratio is 15, decimal fraction part set 0. If frequency dividing ratio is 58.a, then integer set 58, decimal fraction is a*65535. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 47 PLLCON, the xosc12sel bit of PCON3, and the pll_test_en and test_sel bit of PLLCON2. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 48: Low Power Management

    (ISR), else AX2228D will execute the instruction following HOLD. When wakeup from HOLD Mode by watchdog, if watchdog reset enable, AX2228D will be reset, else if watchdog interrupt is enabled, AX2228D will enter watchdog‟s ISR. Else AX2228D will execute the instruction following HOLD.

  • Page 49: Deep Sleep Mode

    5 Low Power Management When exit IDLE mode, AX2228D will enter interrupt service subroutine if EA is enable. If EA is disabled, the instruction next to IDLE will be executed. 5.1.4 Deep Sleep Mode Deep Sleep mode will disable core 1.8V power, all the RAM, OTP, MROM and logic (except for IRTCC) will be power off.

  • Page 50: Power Supply

    5.2 Power Supply AX2228D provides two on-chip low drop-out regulators (LDO) to convert from 5V to 3.3V, 3.3V to 1.8V for internal core power use. It is there to provide high power supply noise rejection and also to minimize power consumption.

  • Page 51: Register 5-2 Pwrcon2 - Power Control 2

    01 = 1.80V 10 = 1.70V 11 = 1.85V V33SEL: VDDIO 3.3V LDO select bit 00 = 3.0V 01 = 3.15V 10 = 3.3V 11 = 3.45V AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 52: General Purpose Input/Output (Gpio)

    Normal Normal Normal Analog 6.3 Function multiplexing In order to provide more flexible port functions and to minimize pin counts, some of the ports are multiplexed with AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 53: Table 6-2 Ports Multiplexed Mapping

    SPI1CLK0 SDCLK1 LCDSEG51 SPI1DI0 SDCMD1 LCDSEG61 SPI1DO0 SPI1DODI0 SDDAT01 LCDCOM41 LCDSEG71 ADC0 PWRWKUP LVDDET ISPCLK CLKO XOSC12I INT2 PWM0 SPI0CLK2 UART0RX0 UDSW VPG33 AUXR1 UART1TX0 AUXL1 UART1RX0 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 54: Gpio Special Function Registers

    Register 6-3 P2DIR-P2 direction Register Position Name P2DIR Default Access P2xDIR: P2x direction control 0 = Output 1 = Input Register 6-4 P3DIR-P3 direction Register Position Name P3DIR Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 55: Register 6-4 P4Dir-P4 Direction Register

    0 = P0x is in low state when read and output low at P0x when write 1 = P0x is in high state when read and output high at P0x when write NOTE: P0[3:2] are reserved. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 56: Register 6-6 P1 - P1 Data Register

    Register 6-9 P0PU0 – P0 pull-up resistor control Position Name P07PU0 P06PU0 P05PU0 P04PU0 Reserved Reserved P01PU0 P00PU0 Default Access P0PU0[x]: P0x 10KΩ pull-up resister control. Valid when P0x is used as input AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 57: Register 6-10 P1Pu0 - P1 Pull-Up Resistor Control

    Position Name P34PU0 P33PU0 P32PU0 P31PU0 P30PU0 Default Access P34PU0/ P33PU0: P34/P33 10KΩ pull-up resister control. Valid when P34/P33 is used as input 0 = resistor disabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 58: Register 6-9 P4Pu0 - P4 Pull-Up Resistor Control

    P17P200 P17 200Ω pull- down resistor enabled 0 = disabled 1 = enabled P16P200 P16 200Ω pull- down resistor enabled 0 = disabled 1 = enabled P06P200 P06 200Ω pull- down resistor enabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 59: Register 6-14 P0Pd0 - P0 Pull-Down Resistor Control

    Register 6-17 P2PD1 – P2 0.5KΩ pull-down resistor control Position Name P27PD1 P26PD1 P25PD1 P24PD1 Default Access P2PD0: P2x pull-down resister control. Valid when P2x is used as input AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 60: Register 6-18 P3Pd0 - P3 10Kω Pull-Down Resistor Control

    P37PD/P36PD/P35PD: P37PD/P36PD/P35PD pull-down resister control. 0 = 10KΩ pull-down resistor disabled 1 = 10KΩ pull-down resistor enabled Register 6-14 P4PD0 – P4 pull-down resistor control Position Name P41PD0 P40PD0 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 61: Register 6-20 Pie0 - Port Digital Input Enable Control

    0 = P00 Input Disabled 1 = P00 Input Enabled Register 6-21 PIE1 – Port digital input enable control1 Position Name PIE16 PIE15 PIE14 PIE13 PIE12 PIE11 PIE10 Default AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 62: Register 6-21 Pie2 - Port Digital Input Enable Control2

    P05DRV P04DRV Reserve Reserve P01DRV P00DRV Default Access P07DRV: P07 Driving selection Bit 0 = P07 Driving is 8mA 1 = P07 Driving is 10Kohm pull-up/pull-down resistor AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 63: Register 6-23 P1Drv0 - Port 1 Driving Control 0

    00 = P10 Driving is 8mA 01 = P10 Driving is 2Kohm pull-up/pull-down resistor 1x = P10 Driving is 24mA Register 6-24 P1DRV1 – Port 1 Driving control 1 Position AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 64: Register 6-25 P2Drv0 - Port 2 Driving Control

    1 = P26 Driving is 2Kohm pull-up/pull-down resistor P25DRV: P25 Driving selection Bit 0 = P25 Driving is 8mA 1 = P25 Driving is 2Kohm pull-up/pull-down resistor AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 65: Register 6-26 P3Drv0 - Port 3 Driving Control

    10 = P32 Driving is 24mA 11 = P32 Driving is 24mA P31DRV: P31 Driving selection Bit 0 = P31 Driving is 8mA 1 = P31 Driving is 2Kohm pull-up/pull-down resistor AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 66: Register 6-27 P3Drv1 - Port 3 Driving Control

    0 = Select P04, P05, P06 1 = Select P30, P31, P32 SPI0_DO_P25: SPI0 DOUT output at P25 0 = Disable 1 = Enable WKPIN_SEL: Port interrupt/wakeup event 2 sources selection AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 67: Port Interrupt And Wakeup

    1 = SDCCLK, SDCCMD and SDCDAT0 are mapped to P20, P21 and P27 6.5 Port interrupt and wakeup AX2228D supports Port interrupt and wakeup function. The PWKEN registers (Wakeup Enable Register) allow PORT to cause wakeup. The PWKEN registers are set to 0Fh upon reset. Clearing bit0-3 in the PWKEN register enables wakeup on corresponding pin.

  • Page 68: Register 6-30 Pwkedge - Port Wakeup Event Select

    1 = Enable SPI0PS1: SPI0 port select 1.See chapter 16 SPI0 COSEL: CLKO sources selection 00 = P3[3] 01 = PLL 12MHz 10 = System clock 11 = XOSCO AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 69: Operation Guide

    (P0), which controls the output levels of the Port 0 pins, P00 through P07. Figure 8-1 shows the internal hardware structure and configuration registers for each pin of Port 0~3. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 70: Timers

    001 = Timer0 counts at every 2 counting source events 010 = Timer0 counts at every 4 counting source events 011 = Timer0 counts at every 8 counting source events AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 71: Timer1

    Timer1 is a 16-bit timer/counter with a 7-bit prescaler. It can be configured as timer, counter or PWM generator. F igure 7-2 shows the block diagram of Timer1 module. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 72: Timer1 Features

    T1ES: Timer1 Capture Edge Select 00 = CAP1 Rising Edge 01 = CAP1 Falling Edge 1X= CAP1 Rising Edge and Falling Edge T1M: Timer1 Mode Select 00 = Timer1 is disabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 73: Register 7-6 Tmr1Con1 - Timer1 Control 1

    101 = Timer1 counts at every 32 counting source events 110 = Timer1 counts at every 64 counting source events 111 = Timer1 counts at every 128 counting source events AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 74: Register 7-7 Tmr1Cnth/Tmr1Cntl - Timer1 Counter

    PWM mode (PWM signal output to PWM2) 7.3.2 Timer2 Special Function Registers Register 7-10 TMR2CON0 – Timer2 control 0 Position Name T2ES Reserve T2IS Default Access T2ES: Timer2 Capture Edge Select AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 75: Register 7-11 Tmr2Con1 - Timer2 Control 1

    100 = Timer2 counts at every 16 counting source events 101 = Timer2 counts at every 32 counting source events 110 = Timer2 counts at every 64 counting source events AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 76: Register 7-12 Tmr2Cnth/Tmr2Cntl - Timer2 Counter

    Capture mode (event source from CAP3)  PWM mode (PWM signal output to PWM3) 7.4.2 Timer3 Special Function Registers Register 7-15 TMR3CON – Timer3 control Position Name T3PND T3ES T3IS T3PSR AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 77: Register 7-16 Tmr3Cnt - Timer3 Counter

    TMR3CNT will be clear to 0x00 when overflow occurs, and the interrupt flag will be set „1‟ by hardware. Register 7-17 TMR3PR – Timer3 Period Position Name TMR3PR Default Access Note: The overflow period of the timer is: Tinc-source * T3PSR * (T3PR + 1). AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 78: Register 7-18 Tmr3Pwm - Timer3 Pwm Duty

    7.5.1 Watchdog Wake up WDT can be used to wake up AX2228D from Idle, Hold or Sleep mode. RSTEN bit (WDTCON [3]) is used to determine the actions after WDT wake up. When RSTEN sets to 0, the watchdog will generate a non-reset wake up after counter overflows.

  • Page 79: Independent Power Real Time Clock Counter (Irtcc)

    7.6.2 IRTCC Timer IRTCC timer can be power independently. It can work even other logic in AX2228D is power off. There is 6-bit valid address for the 64-byte user RAM. So the upper 2-bit of address in the writing RTC_RAM or reading RTC_RAM command are ignored.

  • Page 80: Communication With Irtcc Timer

    One byte address and N byte data Write 0xa3 One byte LCDMAP Read 0xa2 One byte Communication operations: 1, Read or write A type components Write: Write data 8bit Read: AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 81 3, Read or write C type components Write: Write 5 bytes data xx xx xx xx Read: xx xx xx xx Read 5 bytes data 4, Read or write D type components Write: AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 82: Irtcc Components Description

    0 = Disable 1 = Enable X12MEN: Oscillator for external 12MHz crystal resonator enable 0 = Disable 1 = Enable XOPD_EN: OSC output PIN pull-down resistor enable AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 83 10 = 48uA+4.3uA 11 = 28uA+4.3uA OTPPG_EN: OTP power gate enable 0 = Enabled 1 = Disabled RCEN: Internal RC 12MHz oscillator enable 0 = Enabled 1 = Disabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 84 IOSEL: Deep sleep mode and power down mode wakeup pin select 0 = Select P07 1 = Select P33 ALMOE: Alarm output at IRTWKO pin enable 0 = Disabled 1 = Enabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 85 TMR_PND: RTC each minute or date wake up pending 0 = No wake up 1 = Minute or date wake up pending IOWK_PND: P33 or P07 pin wake up pending AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 86 RTCCNT byte 1 Default Access RTCCNT1 is the minute counter; this is BCD code RTCCNT0 - IRTCC counter byte 0 Position Name RTCCNT byte 0 Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 87: Irtcc Special Function Registers

    Position Name IRTRSTEN RD_RTC IRTALPND IRTALIE IRTPND IRTIE DONE Default Access IRTRSTEN: IRTCC second reset enable 0 = Disabled 1 = Enabled RD_RTC: Read IRTCC counter enable AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 88: Register 7-21 Rtcdat – Rtcc Communication Data

    Register 7-22 SECCNT – IRTCC second counter Position Name SECCNT Default Access IRTCC second counter Register 7-23 RTCON1 – IRTCC control1 Position Name WKO_STA RTC_POR XOSCO_STA TSRTC BAUD_SEL SECPND SECIE AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 89: Irtcc Operating Guide

    5) Wait for transmission done (RTCON.1); If send more than one data, please repeat steps 4 and 5 6) Disable CS (RTCON.0) 2. Read Data from register 1) Enable CS (RTCON.0) 2) Write command to RTCDAT register 3) Wait for transmission done (RTCON.1) AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 90 ;RTC enable steps 1 RTCDAT, #54H ;steps 2 Send_Dat_PND ;steps 3 RTCDAT, #00H ;steps 4 Send_Dat_PND ;steps 5 A, RTCDAT ;steps 6 RTCON, #~(1<<0) ;RTC Disable steps 7 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 91: Uart0

    UTEN: UART Enable Bit 0 = Disable UART module 1 = Enable UART module UTTXINV: Transmit Invert Selection Bit 0 = Transmitter output without inverted 1 = Transmitter output inverted AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 92: Register 10-2 Uartsta – Uart0 Status

    Register 10-3 UARTBAUDL – UART0 Baud Rate Low Byte Position Name UARTBAUDL Default Access Register 10-4 UARTBAUDH – UART0 Baud Rate High Byte Position Name UARTBAUDH Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 93: Uart1

    NBITEN: Nine-BIT mode Enable Bit 0 = Eight-bit mode 1 = Nine-bit mode UTEN: UART Enable Bit 0 = Disable UART module 1 = Enable UART module AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 94: Register 10-7 Uart1Sta – Uart1 Status

    When the first 256 bytes of UART receiver already have not read and the second 256 bytes data are also already received , AUTOERR Flag will be „1‟. Register 10-8 UARTDIV – UART1 baud rate high AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 95: Register 10-9 Uart1Baud – Uart1 Baud Rate Low

    In order to get the correct DMA Start Pointer, you should only write this register only one. It is high 8 bits of address. But the “0” bit will be neglected AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 96: Uart1 Operation Guide

    UTTXNB NBITEN UTEN TXIE RXIE OVERFLOWIE DMASEL Default Access UTSBS: Stop Bit Select 0 = 1 bit as Stop Bit 1 = 2 bits as Stop Bit AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 97: Register 8-15 Uart2Sta – Uart2 Status

    1 = Normal Receive or AUTO DMA mode Receive one word done In normal mode, it become “1” every byte, but in DMA mode ,it become “1” every word. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 98: Register 8-16 Uart2Div – Uart2 Divide Register

    Write this location will load the data to transmitter buffer. And read this location will read the data from the receiver buffer. Register 8-19 UART2DMATXCNT –UART2 DMA Transmit counter Portion Name UART2DMATXCNT Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 99: Register 8-20 Uart2Dmatxptr–Uart2 Dma Transmit Start Pointer Byte

    Portion Name UART2POINTL Default Access Register 8-24 UART2POINTH–UART2 DMA point by CPU read high byte Portion Name UART2POINTH Default Access Register 8-25 UART2LOOPCNT–UART2 DMA loop count Position AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 100: Operation Guide

    Enable UART2module by setting UTEN to „1‟ Set TXIE or RXIE „to 1‟ if needed write data to UART2DATA Wait for PND to change to „1‟, or wait for interrupt AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 101 Write the start DMA address. for transmission, Write data to UART2DMATXPTR Write data to UART2DMATXCNT to kick-start a DMA transmit process 10. Wait for PND to change to „1‟, or wait for interrupt AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 102: Spi0

    SPICLK CYCLE # SPICLK (SPIIDST = 0) SPICLK (SPIIDST = 1) SAMPLE INPUT DATA OUT (SPIEDGE = 0) SAMPLE INPUT DATA OUT (SPIEDGE = 1) Figure 9-1 SPI timing AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 103: Spi0 Special Function Registers

    1 = Clock signal stay at 1 when idle SPI0EN: SPI0 enable bit 0 = SPI0 disable 1 = SPI0 enable Register 14-2 SPI0BAUD – SPI0 Baud Rate AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 104: Spi0 Operation Guide

    Select master mode or slave mode Configure clock frequency when master mode is selected in step 3 Select one of the four timing mode (refer to F igure 14-1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 105: Spi1

    11. Go to Step 8 to start another DMA process if needed or turn off SPI0 by clearing SPI0IE and SPI0EN SPI1 AX2228D SPI1 is an accelerated SPI. It can serve as master only. It can operate in normal or DMA mode. Please see PMUXCON0 bit 5 descriptions...

  • Page 106: Spi1 Special Function Registers

    1x = High speed. Bit clock frequency = system clock frequency /1 SPI1EN: SPI1 enable bit 0 = SPI1 disabled 1 = SPI1 enabled Register 14-8 SPI1CON1 – SPI1 Configure Register1 Position Name CRCEN ENCRYPT Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 107: Register 14-7 Spi1Con2 – Spi1 Configure Register 2

    SPI DMA start address pointer, point to the start address in IRAM that the data to be transmitted or data to be stored. Register 14-11 SPI1DMASPL– SPI1 DMA Pointer Position Name SPI1DMASPL Default Access Register 14-12 SPI1DMACNT – SPI1 DMA Counter Position Name SPI1DMACNT AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 108: Spi1 Operation Guide

    Wait for bit SPI1PND to change to „1‟, or wait for interrupt 10. Go to Step 7 to start another DMA process if needed or turn off SPI by clearing SPI1PND and SPI1EN AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 109: External Memory Interface (Emi)

    10 External Memory Interface (EMI) 10 External Memory Interface (EMI) AX2228D provides External Memory Interface (EMI) to accelerate data transfer. F igure 15-1 shows EMI timing. EMI_WEN(P3.3) EMI_DATA(P2) EMIST EMIPW EMIHT Figure 10-1 EMI timing 10.1 EMI Control Registers Register 15-1 EMICON0 – EMI control0...

  • Page 110: Register 15-2 Emicon1 – Emi Control1

    EMIM: EMI mode 0 = work when CPU kick start 1 = work with SPI1 DMA Register 15-2 EMICON2 – EMI control2 Position Name P15POE PWMMODE Default AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 111: Register 15-2 Emicon3 – Emi Control3

    PWM0OE: PWM0 output at P20 enable 0 = disable 1 = enable Register 15-2 EMICON4 – EMI contro4 Position Name EMICON4 Default Access EMICON4: PWM period configure AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 112: Register 15-3 Pwmbuf0/1/2/3/4/5/6/7 –Pwmbuffer0/1/2/3/4/5/6/7

    When EMIM = 1 and EMIEN = 1, EMI transfer will be started by SPI DMA. PWM Operation Guide Configure EMICON1 register; Read data from FFT output buffer; Write data to PWMDAT register. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 113: Audio Terminal (Dac)

    11 Audio Terminal (DAC) Audio Terminal (DAC) Features 11.1 AX2228D provides a high performance stereo 16-bit resolution audio DAC:  Sample Rate 8 / 11.025 / 12 / 16 / 22.05 / 24 / 32 / 44.1 / 48KHz ...

  • Page 114: Function Of Dac Control Registers

    OSSL: DAC over sample mode select 0 = Normal speed mode 1 = Double speed mode DACEN: DAC digital filter/delta-sigma modulator enable 0 = Disabled 1 = Enabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 115: Register 17-4 Dacsm - Dac Soft Mute Configuration Register

    Position Name DACVPND DACVOLL Default Access DACVPND: DAC volume adjust done pending Read “0”: not done Read “1”: done Write “0” clear pending Write “1” affects nothing AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 116: Register 17-7 Dacvolh– Dac Volume Setting High Byte Register

    11 = trim 1 step every 4 samples TRIMSTEP: DAC trim step control 00 = trim step is 1 01 = trim step is 2 10 = trim step is 4 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 117: Register 17-10 Trimcon2 - Dac Trim Control Register2

    Register 17-11 TRREGLL - DAC left channel trim data reg law byte Position Name TRIMREGLL Default Access TRIMREGLL: Write: DAC anticipant trimming data reg law byte Read: DAC real trimming data law byte AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 118: Operation Guide

    Read: DAC real trimming data high byte Operation Guide 11.3 D AC Operation Guide 2 1 2 B Configure DACVOLL & DACVOLH Configure DACVCON Clear DACVPND to kick start adjust volume AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 119: Saradc

    12 SARADC 12 SARADC 12.1 Features AX2228D provides an eight-channel moderate conversion speed and a moderate resolution 10-bit successive approximated register Analog to Digital Converter (SARADC) for users to develop applications in the following areas:  Voice grade applications ...

  • Page 120: Register 19-2 Adcmode– Saradc Mode Control

    AUTOS: Auto channel switching mode 0 = Not switch 1 = Auto load ADCSEL_SH into ADCSEL after conversion finished Register 19-3 ADCBAUD– SARADC baud rate control Position Name ADCBAUD Default AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 121: Register 19-4 Adcdatal– Saradc Buffer Low Byte Control

    Register 19-4 ADCDATAL– SARADC Buffer low byte control Position Name ADCDATAL Default Access Register 19-5 Register 21-4 ADCDATAH– SARADC Buffer high byte control Position Name ADCDATAH Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 122: Integrated Interchip Sound (Iis)

    IIS Reference Clock IISWS IIS Word Select IISBCLK IIS Bit Clock IISDI0 IIS Data In0 IISDO0 IIS Data Out0 IISDI1 IIS Data In1 IISDO1 IIS Data Out1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 123: Iis Special Function Register

    011 = 32-bit 1 channel (left or right) 100 = 32-bit 2 channels (left and right) Others = invalid EN: IIS enable bit 0 = Disable 1 = Enable AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 124: Register 22-2 Iiscon1

    IIS has a dedicated baud rate generator. It is controlled by register IISBAUD It determines the output IISBCLK in master mode as: Baud rate = Fmoduleclock/(IISBAUD+1) Register 22-4 IISCKCON: Position AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 125: Register 22-5 Iisch0: First Group Of Iis Buffer

    IISCH1: FIFO buffer of IIS group two Write: four times high byte first Read: four times high byte gets first Register 22-7 IISADR: Position IISADRH[5:0] Name IISADDRL[7:0] Default Access AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 126: Operation Guide

    In slave mode 3, it supports standard frame structure and data left adjust. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 127: Iis Operation Flow

    Configure port input/output depending on different mode. Set EN „1‟ reconfigure DMA and kick start Wait for PND locale at IISCON1[6] change to 1 or wait for IIS interrupt AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 128: Lcd Driver

    LCDSEG41 LCDSEG41 LCDSEG50 LCDSEG51 LCDSEG51 LCDSEG60 LCDSEG61 LCDSEG61 LCDSEG70 LCDSEG71 LCDSEG72 LCDSEG80 LCDSEG81 LCDSEG81 LCDSEG9 LCDSEG9 LCDSEG9 Table 23-2 Support panel in auto display mode Type Panel AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 129 14 LCD driver AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 130: Position

    COM4EN: LCDCOM4 enable 0 = LCDCOM4 disabled 1 = LCDCOM4 enabled COM3EN: LCDCOM3 enable 0 = LCDCOM3 disabled 1 = LCDCOM3 enabled LCD_EN: LCD driver enable 0 = disabled AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 131: Register 23-2 Lcd_Cfg1 - Lcd Configuration Control 1

    Name IOEDGE UDSW_EN P05_MAP P04_MAP P14_MAP P27_MAP P10_MAP MAP_SEL Default Access IOEDGE: Normal IO (P33 and P07) wake up level select 0 = High level wake up AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 132: Register 23-4 Lcd_Com0L – Segment Data Low Byte For Lcdcom0

    Default Access Register 23-5 LCD_COM0H - Segment data high byte for LCDCOM0 Position Name LCD_COM0H Default Access Register 23-6 LCD_COM1L - Segment data low byte for LCDCOM1 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 133: Access Wo Wo Wo Wo Wo Wo Wo Wo

    Access Register 23-12 LCD_COM4L - Segment data low byte for LCDCOM4 Position Name LCD_COM4L Default Access Register 23-13 LCD_COM4H - Segment data high byte for LCDCOM4 Position AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 134: Access Wo Wo Wo Wo Wo Wo Wo Wo

    Name LCD_COM4H Default Access When use “LCD_COM_WCMD” command to configure these LCDCOM data bytes, the first byte is for low byte, the second is for high byte. AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 135: Characteristics

    12.067 13.734 For PORT0/1/3 PUP1 KΩ Internal pull-down resister 1 12.067 13.734 For PORT0/1/3 PDN1 Level1 current driving For PORT1 LEVEL1 Level2 current driving For Port1.1 LEVEL2 AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 136: Osc Parameters

    Table 15-5 Audio DAC Parameters Characteristics Unit Conditions SNR&DR 48PIN SNR&DR 28PIN & 20 PIN THD+N 10Kohm loading ClassAB power 32ohm loading output Maximum output voltage 10Kohm loading AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.

  • Page 137: Package Dimensions

    16 Package Dimensions 16 Package Dimensions 16.1 AX2228D LQFP48 Figure 16-1 AX2228D LQFP48 package dimensions AX2228D Audio Player Microcontroller Version 1.0.0 Copyright © 2015, www.appotech.com. All Rights Reserved.
  • Page 139 AppoTech makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does AppoTech assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.

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