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APPOTECH AX1006 User Manual

Audio player microcontroller
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AX1006
Audio Player Microcontroller
User Manual
[AX1006-UM-100-EN]
Versions: 1.0.0
Release Date: 2014-7-10

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Summary of Contents for APPOTECH AX1006

  • Page 1 AX1006 Audio Player Microcontroller User Manual [AX1006-UM-100-EN] Versions: 1.0.0 Release Date: 2014-7-10...

  • Page 2: Table Of Contents

    Power-on Reset (POR) ......................20 System Reset ..........................20 4.2.1 LVD ............................ 21 4.2.2 RTCC Reset ........................23 4.2.3 Watchdog Reset ....................... 23 4.2.4 Port Wakeup Reset ......................23 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 3 Timer1 Special Function Registers ..................50 Timer2 ............................51 7.3.1 Timer2 Features ........................ 52 7.3.2 Timer2 Special Function Registers ..................52 Timer3 ............................54 7.4.1 Timer3 Features ........................ 54 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 4 SPI1 Special Function Registers ..................77 9.2.2 SPI1 Operation Guide ....................... 79 10 External Memory Interface (EMI) ....................80 EMI Control Registers ....................... 80 10.1 11 Audio Terminal (DAC) ........................83 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 5 I/O Parameters ......................... 90 13.3 Audio DAC Parameters ......................91 13.4 14 Package Dimensions ........................92 AX1006 SSOP24 ........................92 14.1 Appendix I Revision History ........................i AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 6: Product Overview

     Independent powered RTCC;  48MHz PLL-based clock generator;  Six Channels 10-bit SARADC;  Power on Reset;  Combine with plug-in CW6639 to realize Bluetooth phone. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 7: Pin Definitions

    Table 2-1 shows the pin descriptions of SSOP24 package. Table 2-1 SSOP24 pin description Pin No. Name Type Function USBDM USB Negative Input/output USBDP USB Positive Input/output EMID1 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 8 DAC Ground MICIN1 VCMBUF AUXL2 AUXL0 SPI0DI2 SDDAT1 UART0RX1 GPIO ADC0 PWRWKUP LVDDET CLKO GPIO ADC2 INT0 SPI1DO1 SPI1DODI1 PWM1 SPI0DODI1 SPI0DO1 GPIO ADC3 INT1 SPI1CLK1 CAP0 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 9 SPI1DODI0 SDDAT01 GPIO SPI1DI0 SDCMD1 GPIO ADC4 SPI1CLK0 SDCLK1 GPIO I: input; O: output; PWR: power; GND: ground; AO: Analog Output; AI： Analog Input； NC: not connect AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 10: Cpu Core Information

    3 CPU Core Information CPU Core Information 3.1 Architecture The AXC51-CORE of AX1006 is fully compatible with the MCS-51 instruction set. The AXC51-CORE employs a pipelined architecture that greatly increases its instruction throughput over the standard 8051 architecture. In a standard 8051, all instructions except for MUL and DIV take 12 or 24 system clock cycles to execute, and usually have a maximum system clock of 12MHz.
  • Page 11 1 or 3 C, bit addr @A+DPTR A, #data data addr, #data @Ri, #data Rn, #data SJMP code addr C, bit addr MOVC* A, @A+PC data addr, data addr AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 12 1 or 3 XCHD A, @Ri DJNZ Rn, code addr 1 or 3 MOVX A, @DPTR MOVX A, @Ri A, data addr A, @Ri AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 13: Memory Mapping

    A @Ri, A Rn, A 3.3 Memory Mapping 3.3.1 Program Memory Mapping As illustrated in Figure 3-1, AX1006 program include 16KB IRAM at the address form 0x0000 to 0x3FFF. 0xFFFF Reserved 0x8000 0x7FFF 32K OTP 0x0000 CODE Space...

  • Page 14: External Data Memory Mapping

    Figure 3-3. The memory space is shown divided into three blocks, which are generally referred to as the Lower 128, the Upper 128, and SFR space. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 15: Interrupt Processing

    Setting EA to logic 0 disables all interrupts regardless of the individual interrupt-enable settings. The interrupt enables and priorities are functionally identical to those of the 80C52. The AX1006 provides 1 set of vectors entry addresses, starting from 0x0003. The vector base address is set by DPCON [7:6].
  • Page 16 IP1.4 IPH1.5 Timer 0 0x0063 TMR0CON.7 IE1.5 IP1.5 RTCC RTCON.7 UART0 UARTSTA.5&UARTSTA.4 UART1 UART1STA.3&UART1STA2 IPH1.6 0x006B IE1.6 IP0.7 IP1.6 LVDCON.7 IIS_CON1.7 IPH1.7 SPI1 0x0073 SPI1CON.7 IE1.7 IP1.7 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 17: Interrupt Priority

    0 = DPSEL toggle disable 1 = DPSEL toggle enable EINSTEN: Extern instruction enables 0 = Disable 1 = Enable DPSEL: DPTR Select 0 = Active DPTR0 1 = Active DPTR1 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 18 DPTR. The AX1006 offers a programmable option that allows any instructions related to data pointer to toggle the DPSEL bit automatically. This option is enabled by setting the toggle-select-enable bit (DPTSL) to logic 1.
  • Page 19 In a standard 8051, there is only an 8-bit stack pointer (SP). It can only use the internal 256 byte data memory as stack memory. To increase the stack space for more complex application, AX1006 supports a 16-bit extend stack pointer, it can use both internal data RAM and the 20K byte on-chip SRAM as stack memory.
  • Page 20 IE04: MP3 decoder and encoder interrupt enable 0 = Disable 1 = Enable IE03: Timer2 interrupt enable 0 = Disable 1 = Enable IE02: Timer1 interrupt enable 0 = Disable AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 21 IE11: SDC interrupt enable 0 = Disable 1 = Enable IE10: USB control interrupt enable 0 = Disable 1 = Enable Register 3-12 IPH0 – Interrupt Priority high 0 Position AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 22 IPH02, IP02: Timer1 interrupt priority 11 = level 3 highest priority 10 = level 2 01 = level 1 00 = level 0 lowest priority IPH01, IP01: SINT1 interrupt priority AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 23 01 = level 1 00 = level 0 lowest priority IPH14, IP14: Timer 3 interrupts priority 11 = level 3 highest priority 10 = level 2 01 = level 1 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 24 00 = level 0 lowest priority IPH10, IP10: USB control interrupts priority 11 = level 3 highest priority 10 = level 2 01 = level 1 00 = level 0 lowest priority AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 25: Reset Generation

    Sometimes, when the VDD is power-off and quickly power-on again, there might be cases that the POR will work improperly and internal reset might not be generated. For this reason, AX1006 POR circuit incorporates an internal self-reset module to discharge PORB output during power-off to ensure each power cycle will work properly.

  • Page 26: Lvd

    Low-Drop-Out regulator (LDO) and that supplies power to internal VDDCORE. User for such reason can momentarily monitor the VDDLDO power if externally connects to some batteries and detect if external power source starts dropping to a level that AX1006 LDO cannot tolerate and can do proper actions in the system program.
  • Page 27 VD1EN: VDDLDO voltage enable bit. Low active 0 = VDDLDO voltage detection is enabled 1 = VDDLDO voltage detection is disabled LVDS: Voltage detection level select 00 = 2.2V/1.8V AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 28: Rtcc Reset

    AX1006 can be reset by RTCC second and alarm interrupt when IRTRSTEN bit in RTCON is set to 1. 4.2.3 Watchdog Reset If Watchdog timer is enabled, and WDTCON [5] is not written by 1 within watchdog overflow time period, AX1006 will be reset by Watchdog overflow.
  • Page 29 SDCCEN: SDC clock enable 0 = Enable 1 = Disable WMACEN: WMA Decode clock enable 0 = Enable 1 = Disable SPICEN: SPI clock enable 0 = Enable AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 30 Position Name IISREFCSEL OTP2ICEN BASSCEN AUALUEN reserved reserved RCEN ISPCEN Default Access IISREFCSEL: IIS Reference clock source select 0 = Select system clock 1 = Select XOSC12M AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 31 1 = External 32 KHz or 12MHz crystal oscillator controlled by CLKCON2 [6] and CLKCON2 [7] as shown in Figure X12MEN RTC_CFG.6 CLKCON2.6 XCK12V X32KEN XOSC RTC_CFG.7 CLKCON2.7 RTC_CFG.5 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 32 11 = Divided by 8 from system clock source PLLDIVSEL: PLL output divide select 00 = Select 48MHz output 01 = Select 24MHz output 10 = Select 16MHz output 11 = Select 12MHz output AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 33: Phase Lock Loop (Pll)

    4.3.2 Phase Lock Loop (PLL) AX1006 provides one on-chip Phase Locked Loop (PLL 48M) clock generators. The PLL has reference clock from external 32 KHz/4M/12 M crystal oscillators to provide a stable reference clock and the reference clock is multiplied to provide the final PLL output.
  • Page 34 0 = Select XOSC output (4M, 12M or 32.768K) 1 = Select XOSC 12.288M 374 divide clock RC_SEL: PLL input RC select 0 = Select RC output 1 = Select XOSC AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 35: Low Power Management

    (ISR), else AX1006 will execute the instruction following HOLD. When wakeup from HOLD Mode by watchdog, if watchdog reset enable, AX1006 will be reset, else if watchdog interrupt is enabled, AX1006 will enter watchdog‟s ISR. Else AX1006 will execute the instruction following HOLD.

  • Page 36: Power Supply

    5 Low Power Management When exit IDLE mode, AX1006 will enter interrupt service subroutine if EA is enable. If EA is disabled, the instruction next to IDLE will be executed. 5.2 Power Supply AX1006 provides two on-chip low drop-out regulators (LDO) to convert from 5V to 3.3V, 3.3V to 1.2V for internal core power use.

  • Page 37: General Purpose Input/Output (Gpio)

    Table 6-1 Pad types Type Driving (mA) Pull-up resistor (Kohm) Pull-down resistor (Kohm) Mode Normal Normal Normal Reserved Reserved Reserved Reserved Reserved Analog AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 38: Function Multiplexing

    SPI0CLK0 EMID7 SDDAT00 SPI0DODI0 SPI0DO0 ADC4 SPI1CLK0 SDCLK1 SPI1DI0 SDCMD1 SPI1DO0 SPI1DODI0 SDDAT01 ADC0 PWRWKUP LVDDET CLKO INT2 PWM0 SPI0CLK2 UART0RX0 UDSW VPG33 AUXR1 UART1TX0 AUXL1 UART1RX0 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 39: Port Interrupt And Wakeup

    6.4 Port interrupt and wakeup 6.4 Port interrupt and wakeup AX1006 supports Port interrupt and wakeup function. The PWKEN registers (Wakeup Enable Register) allow P04, P05, P34/DP/DM and P07 to cause wakeup. The PWKEN registers are set to 0Fh upon reset. Clearing bit0-3 in the PWKEN register enables wakeup on corresponding pin of P04, P05, P34/DP/DM and P07.
  • Page 40 Access P1[x]: P1x data. Valid when P1x is used as GPIO 0 = P1x is in low state when read and output low at P1x when write AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 41 0 = 10KΩ pull-up resistor disabled 1 = 10KΩ pull-up resistor enabled P1PU5: P15 10KΩ pull-up resister control. Valid when P15 is used as input. 0 = 10KΩ pull-up resistor disabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 42 00 = resistor disabled 01 = 10KΩ pull-up resistor enabled 10 = 500Ω pull-up resistor enabled 11 = reserved Register 6-13 P3PU0 – P3 pull-up resistor control AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 43 P2PD0: P2x pull-down resister control. Valid when P2x is used as input 00 = resistor disabled 01 = 10KΩ pull-down resistor enabled 10 = 500Ω pull-down resistor enabled 11 = 3.3KΩ pull-down resistor enabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 44 1 = 500Ω pull-up resistor enabled P37PU/P36PU/P35PU: P37PU/P36PU/P35PU pull-up resister control. 0 = 10KΩ pull-up resistor disabled 1 = 10KΩ pull-up resistor enabled P37PD/P36PD/P35PD: P37PD/P36PD/P35PD pull-down resister control. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 45 Register 6-21 PIE1 – Port digital input enable control1 Position Name PIE15 PIE14 PIE13 PIE12 PIE11 PIE10 Default Access PIE15: P37 Digital Input Enable Bit (For AUXL1) 0 = P37 digital Input Disabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 46 0 = 10KΩ pull-up resistor disabled 1 = 10KΩ pull-up resistor enabled P00DRV: P00 10KΩ pull-up resister control. 0 = 10KΩ pull-up resistor disabled 1 = 10KΩ pull-up resistor enabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 47 1 = 500 ohm P17DRV: P17 Driving selection Bit 0 = P17 Driving is 8mA 1 = P17 Driving is 2Kohm pull-up/pull-down resistor P16DRV: P16 Driving selection Bit AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 48 0 = P20 Driving is 8mA 1 = P20 Driving is 2Kohm pull-up/pull-down resistor Register 6-26 P3DRV0 – Port 3 Driving control Position Name P27DRV P34DRV P33DRV P32DRV P31DRV P30DRV AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 49 1 = P36 Driving is 2Kohm pull-up/pull-down resistor P35DRV: P35 Driving selection Bit 0 = P35 Driving is 8mA 1 = P35 Driving is 10Kohm pull-up/pull-down resistor AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 50: Wakeup Registers

    0 = No INT3 wakeup event occurred 1 = INT3 wakeup event occurred WKPND2 0 = No INT2/DP/DM/IRTWKO wakeup event occurred 1 = INT2/DP/DM/IRTWKO wakeup event occurred WKPND1 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 51 10 = System clock 11 = XOSCO WKEDGx: Port interrupt Edge Select 0 = Select rising edge as interrupt trigger event 1 = Select falling edge as interrupt trigger event AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 52: Operation Guide

    (P0), which controls the output levels of the Port 0 pins, P00 through P07. Figure 8-1 shows the internal hardware structure and configuration registers for each pin of Port 0~3. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 53: Timers

    001 = Timer0 counts at every 2 counting source events 010 = Timer0 counts at every 4 counting source events 011 = Timer0 counts at every 8 counting source events AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 54: Timer1

    7bits pre-scaler  Counter mode (clock source from system clock or TMR1)  Capture mode (event source from CAP1)  PWM mode (PWM signal output to PWM1) AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 55: Timer1 Special Function Registers

    T1CPND: Timer1 Capture mode Pending Bit 0 = Not Pending 1 = Pending T1TIE: Timer1 over Flow Interrupt Enable Bit 0 = Interrupt Disable 1 = Interrupt Enable AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 56: Timer2

    TMR1CNT will be captured to TMR1PWM when selected event occurs. 7.3 Timer2 Timer2 is a 16-bit timer/counter with a 7-bit prescaler. It can be configured as timer, counter or PWM generator. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 57: Timer2 Features

    Name T2TPND T2CPND T2TIE T2CIE T2PSR Default Access T2TPND: Timer2 over Flow Pending Bit 0 = Not Pending 1 = Pending T2CPND: Timer2 Capture mode Pending Bit AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 58 TMR2PWM is reserved in timer/counter mode. In PWM mode, it is used as duty cycle setting. In capture mode, the value of TMR2CNT will be captured to TMR2PWM when selected event occurs. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 59: Timer3

    011 = Timer3 counts at every 8 counting source events 100 = Timer3 counts at every 16 counting source events 101 = Timer3 counts at every 32 counting source events AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 60: Watchdog Timer (Wdt)

    7.5.1 Watchdog Wake up WDT can be used to wake up AX1006 from Idle, Hold or Sleep mode. RSTEN bit (WDTCON [3]) is used to determine the actions after WDT wake up. When RSTEN sets to 0, the watchdog will generate a non-reset wake up after counter overflows.

  • Page 61: Watchdog Sfr

    7.5 Watchdog Timer (WDT) instruction.  During Sleep mode, AX1006 can be wakeup by WDT with reset.  During Deep Sleep mode, AX1006 cannot be wakeup by WDT. 7.5.2 Watchdog SFR Register 7-19 WDTCON – Watchdog control Position Name WDTPD...

  • Page 62: Independent Power Real Time Clock Counter (Irtcc)

    7.6.2 IRTCC Timer IRTCC timer can be power independently. It can work even other logic in AX1006 is power off. There is 6-bit valid address for the 64-byte user RAM. So the upper 2-bit of address in the writing RTC_RAM or reading RTC_RAM command are ignored.
  • Page 63 Read 2 to 10 bytes data 3, Read or write C type components Write: Write 5 bytes data xx xx xx xx Read: AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 64: Irtcc Components Description

    …… address Read 1 to 64 bytes data 7.6.4 IRTCC components description Register 7-20 RTCCFG - IRTCC configuration Position Name X32KEN X12MEN XOPD_EN WKPIN_STA F1HZEN EX32KSEL reserved AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 65 PDFLAG DAY_WKEN MIN_WKEN IOWK_EN WKO_EN ALMEN Default Access IOSEL: Deep sleep mode and power down mode wakeup pin select 0 = Select P07 1 = Select P33 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 66 1 = RTCC timer is just power on LVDPND: LVD pending 0 = VDDLDO is higher than 2V 1 = VDDLDO is lower than 2V TMR_PND: RTC each minute or date wake up pending AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 67 RTCCNT byte 1 Default Access RTCCNT1 is the minute counter; this is BCD code Register 7-28 RTCCNT0 - IRTCC counter byte 0 Position Name RTCCNT byte 0 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 68: Irtcc Special Function Registers

    Register 7-32 RTCON – RTCC control Position Name IRTRSTEN RD_RTC IRTALPND IRTALIE IRTPND IRTIE DONE Default Access IRTRSTEN: IRTCC second reset enable 0 = Disabled 1 = Enabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 69 Read RTCDAT will return IRTCC data. Register 7-34 SECCNT – IRTCC second counter Position Name SECCNT Default Access IRTCC second counter Register 7-35 RTCON1 – IRTCC control1 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 70: Irtcc Operating Guide

    5) Wait for transmission done (RTCON.1) 6) Read data from RTCDAT; If read more than one data, please repeat steps 4, 5 and 6 7) Disable CS (RTCON.0) AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 71 ; steps 2 Send_Dat_PND ; steps 3 RTCDAT, #00H ; steps 4 Send_Dat_PND ; steps 5 A, RTCDAT ; steps 6 RTCON, #~ (1<<0) ; RTC Disable steps 7 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 72: Universal Asynchronous Receiver/Transmitter (Uart)

    1 = Nine-bit mode UTEN: UART Enable Bit 0 = Disable UART module 1 = Enable UART module UTTXINV: Transmit Invert Selection Bit 0 = Transmitter output without inverted AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 73 Register 8-3 UARTBAUDL – UART0 Baud Rate Low Byte Position Name UARTBAUDL Default Access Register 8-4 UARTBAUDH – UART0 Baud Rate High Byte Position Name UARTBAUDH Default AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 74: Uart1

    UTTXNB: The ninth bit data of transmitter buffer. Write the ninth bit into this location that you want to transmit NBITEN: Nine-BIT mode Enable Bit 0 = Eight-bit mode 1 = Nine-bit mode AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 75 1 = UART AUTO DMA receive overflow When the first 256 bytes of UART receiver already have not read and the second 256 bytes data are also already AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 76 In order to get the correct DMA Start Pointer, you should write this register twice. First write the higher byte, then the low byte. Register 8-13 UARTDMARXPTR–UART DMA receive Start Pointer byte Portion Name UARTDMARXPTR Default AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 77: Uart1 Operation Guide

    Wait for PND to change to „1‟, or wait for interrupt Go to Step 5 or 6 to start another DMA process if needed or turn off UART1 by clearing TXIE or TXIE and UTEN AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 78: Spi

    Or 3 pins for 3-wire mode: P1.4, P0.0, P3.4  Serial Data Out (SPI0DO2) – P1.4  Serial Data In (SPI0DI2) – P0.0  Serial Clock (SPI0CLK2) – P3.4 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 79: Spi0 Special Function Registers

    0 = Select P27, P25, P26 when SPI0PS1 = 0; Select P14, P00, P34 when SPI0PS1 = 1 1 = Select P04, P06, P05 when SPI0PS1 = 0 SPI0EDGE: SPI0 sampling edge select bit When SPI0IDST = 0: AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 80 Nbyte = Nunit * 2 = (SPI0DMACNT + 1) * 2 Register 9-5 SPI0DMAPTRH– SPI0 DMA Start Pointer high byte Position Name SPI0DMAPTRH Default Access Register 9-6 SPI0DMAPTRL– SPI0 DMA Start Pointer low byte Position Name SPI0DMAPTRL AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 81: Spi0 Operation Guide

    11. Go to Step 8 to start another DMA process if needed or turn off SPI0 by clearing SPI0IE and SPI0EN SPI1 AX1006 SPI1 is an accelerated SPI. It can serve as master only. It can operate in normal or DMA mode. Please see PMUXCON0 bit 5 descriptions...

  • Page 82: Spi1 Special Function Registers

    (TX or RX) is allowed. Use this bit to select TX or RX. SPI1WS: SPI1 2-wire mode/3-wire mode select bit 0 = 3-wire mode 1 = 2-wire mode SPI1DEC:SPI1 decryption function enables 0 = Disabled 1 = Enabled AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 83 SPI DMA start address pointer, point to the start address in IRAM that the data to be transmitted or data to be stored. Register 9-11 SPI1DMASPL– SPI1 DMA Pointer Position Name SPI1DMASPL Default Access AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 84: Spi1 Operation Guide

    Wait for bit SPI1PND to change to „1‟, or wait for interrupt 10. Go to Step 7 to start another DMA process if needed or turn off SPI by clearing SPI1PND and SPI1EN AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 85: External Memory Interface (Emi)

    10.1 EMI Control Registers 10 External Memory Interface (EMI) AX1006 provides External Memory Interface (EMI) to accelerate data transfer. Figure 10-1 shows EMI timing. EMI_WEN(P3.3) EMI_DATA(P2) EMIST EMIPW EMIHT Figure 10-1 EMI timing 10.1 EMI Control Registers Register 10-1 EMICON0 – EMI control0...
  • Page 86 EMIM: EMI mode 0 = work when CPU kick start 1 = work with SPI1 DMA Register 10-3 EMIBUF – EMI output buffer Position Name EMIBUF Default AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 87 When EMIM = 1 and EMIEN = 1, EMI transfer will be started by SPI DMA. PWM Operation Guide Configure EMICON1 register; Read data from FFT output buffer; Write data to PWMDAT register. AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 88: Audio Terminal (Dac)

    11 Audio Terminal (DAC) 11 Audio Terminal (DAC) 11.1 Features AX1006 provides a high performance stereo 16-bit resolution audio DAC:  Sample Rate 8 / 11.025 / 12 / 16 / 22.05 / 24 / 32 / 44.1 / 48KHz ...

  • Page 89: Function Of Dac Control Registers

    1 = Double speed mode DACEN: DAC digital filter/delta-sigma modulator enable 0 = Disabled 1 = Enabled Register 11-4 DACSM - DAC soft mute configuration register Position Name DACSM Default Access AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 90 Read “0”: not done Read “1”: done Write “0” clear pending Write “1” affects nothing Register 11-7 DACVOLH– DAC volume setting high byte register Position Name DACVOLH Default Access AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 91: Operation Guide

    10 = Steps is “4” 11 = Steps is “8” 11.3 Operation Guide DAC Operation Guide Configure DACVOLL & DACVOLH Configure DACVCON Clear DACVPND to kick start adjust volume AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 92: Saradc

    12 SARADC 12 SARADC 12.1 Features AX1006 provides an eight-channel moderate conversion speed and a moderate resolution 10-bit successive approximated register Analog to Digital Converter (SARADC) for users to develop applications in the following areas:  Voice grade applications ...
  • Page 93 0 = Not switch 1 = Auto load ADCSEL_SH into ADCSEL after conversion finished ADCSEL_SH: ADCSEL shadow Register 12-3 ADCBAUD– SARADC baud rate control Position Name ADCBAUD Default Access AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.
  • Page 94 Register 12-4 ADCDATAL– SARADC Buffer low byte control Position Name ADCDATAL Default Access Register 12-5 Register 21-4 ADCDATAH– SARADC Buffer high byte control Position Name ADCDATAH Default Access AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 95: Characteristics

    12.067 13.734 For PORT0/1/3 PUP1 KΩ Internal pull-down resister 1 12.067 13.734 For PORT0/1/3 PDN1 Level1 current driving For PORT1 LEVEL1 Level2 current driving For Port1.1 LEVEL2 AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 96: Audio Dac Parameters

    Table 13-4 Audio DAC Parameters Characteristics Unit Conditions SNR&DR 48PIN SNR&DR 28PIN & 20 PIN THD+N 10Kohm loading ClassAB power 32ohm loading output Maximum output voltage 10Kohm loading AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 97: Package Dimensions

    14.1 AX1006 SSOP24 14 Package Dimensions 14.1 AX1006 SSOP24 Figure 14-1 AX1006 SSOP24 package dimensions AX1006 Audio Player Microcontroller Version 1.0.0 Copyright © 2014, www.appotech.com. All Rights Reserved.

  • Page 98: Appendix I Revision History

    AppoTech makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does AppoTech assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.

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