700 Mhz Receiver Front-End; Receiver Front-End; Receiver Back-End - Motorola CDM1550 LS+ Detailed Service Manual

200 mhz; 700 mhz; professional series
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Theory of Operation
2-25
2. 7
700 MHz Receiver Front-End
The 700 MHz receiver design is separated into two blocks, the front end and the back end. The
overall block diagram of the receiver is shown in Figure 2-11. Detailed descriptions of these stages
are contained in the paragraphs that follow.
Antenna
RF
Filter
Amp
RX from
If=\!
~.
Antenna
Switch
____.,.~
First LO
from Synthesizer
RFAmp
Crystal
IF
Crystal
IF
Filter
1st Mixer
:~~~
-r
T
-=
Recovered
Aud
io~--._,
RSSI
....
~1-----i
L__ _ _
_ _ _ _ _
_
Figure 2-11. 700 MHz Receiver Block Diagram
2.7.1
Receiver Front-End
T
The received signal from the antenna is routed through the harmonic filter and antenna switch and
applied to the antenna filter FL3000. This is a fixed-tuned 3-pole ceramic bandpass filter with a
passband of 7 44 MHz to 766 MHz and an insertion loss of 2.6 dB. The output of this filter is coupled
to RF amplifier 03001. Diode CR3000 protects the RF amplifier by limiting excessive RF levels.
The output of the RF amplifier is applied to the RF amp filter FL3001, identical to FL3000. The
output of FL3001 is routed through a switchable local-distance attenuator consisting of R3013,
D3000, 03003 and associated components. Normally 03003 and D3000 are on and the receiver
sensitivity is at maximum. When 03003 and D3000 are off, the series resistor R3013 reduces
receiver sensitivity to minimize intermodulation when operating in the presence strong undesired
signals. The output of the local-distance attenuator is connected to the passive double-balanced
mixer consisting of components T3001, T3002, and CR3001. High-side injection from the frequency
synthesizer is band-pass filtered by C3021-C3029 and L3008-9 to remove second harmonic energy
which may degrade half-IF spurious rejection performance, and applied to T3002 at a level of
+18 dBm.
The IF output from T3002 is applied to a diplexer (L3006-7, C3017-3020 and R3014) which matches
the 73.35 MHz IF signal to the crystal filter and terminates the mixer into 50n at all other
frequencies.
2.7.2
Receiver Back-End
The receiver back end is a dual conversion design. The 73.35 MHz high IF consists of 2-pole crystal
filter FL31 01, IF amp 03101, 2-pole crystal filter FL3102 and IF amp 03102. Each crystal filter has
a 3 dB bandwidth of 9.0 kHz and a maximum insertion loss of 2 dB. The output of 03102 is applied
to the input of the receiver IFIC U3101. Diode D3101 prevents overdriving the IFIC.

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