PMC-Sierra PM5354 Features

Multi-rate SATURN User Network Interface for 2x622 and 4x155
FEATURES
• Single chip ATM and POS User
Network Interface that supports up to
2x622.08 Mbit/s, 4x155.52 Mbit/s,
1x622.08 + 3x155.52 Mbit/s, or
2x622.08 Mbit/s + 2x155.52 Mbit/s.
• Implements the ATM Forum User
Network Interface Specification and
the ATM physical layer for Broadband
ISDN according to CCITT
Recommendation I.432.
• Implements the Point-to-Point Protocol
(PPP) over SONET/SDH specification
according to RFC 2615(1619)/1662 of
the PPP Working Group of the Internet
Engineering Task Force (IETF).
• Processes up to two duplex bit-serial
622.08 Mbit/s STS-12 (STM-4) data
streams with on-chip clock and data
recovery and clock synthesis. Each
STS-12 (STM-4) may contain a single

BLOCK DIAGRAM

Transmit Analog
TXD_P/N[4:1]
Circuitry
Clock
Synthesis
REFCLK77_P/N
Unit
Receive Analog
RXD_P/N[4:1]
Circuitry
SD[4:1]
SD_TEST
PMC-2021540 (R3) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE
STS-12c (AU-4-4c) or up to four
STS-3c (AU-4).
• Processes up to four duplex bit-serial
155.52 Mbit/s STS-3 (STM-1) data
streams with on-chip clock and data
recovery and clock synthesis. Each
STS-3 (STM-1) may contain a single
STS-3c (AU-4).
• Permits mixed OC-12 and OC-3 data
streams.
• Complies with Telcordia
GR-253-CORE jitter tolerance, jitter
transfer, and intrinsic jitter criteria.
• Provides termination for SONET
Section, Line, and Path overhead or
SDH Regenerator Section, Multiplexer
Section, and High Order Path
overhead.
• Provides cross bar functionality to
swap STS-12 and STS-3 clients
to/from different line-side interfaces.
LINE_IF
Transmit Transmit
Section Path
Trace Trace
Processor Processor
(4)
Transmit Transmit
Transmit
Transmit Regen/ Virtual
Path
Line Multiplexor Container
Processor
Interface Processor Aligner
(4) (4)
SARC
Alarm Report
Controller (4)
Bit error
rate mon
(4)
Receive Receive
Receive
Receive Regen/ Virtual
Path
Line Multiplexor Container
Processor
Interface Processor Aligner
(4)
(4) (4)
Receive Receive
Section Path
Trace Trace
Processor Processor
(4) (4)
Released
SONET/APS
LVDS I/f
(4)
Receive
APS
(4)
(4)
X-Bar
In
band
Alarm
PRBS
(4) (4)
generator
/ monitor
(4)
X-Bar
Transmit
APS
(4)
LVDS I/f
(4)
S/UNI MULTI 2x12
• Provides support for automatic
protection switching via a 4-bit LVDS
777.6 MHz port.
• Provides cross bar functionality to
swap STS-12 and STS-3 lines and/or
clients to/from different APS interfaces.
• Provides UTOPIA Level 3 32-bit wide
System Interface (clocked up to 104
MHz) with parity support for ATM
applications.
• Provides SATURN® POS-PHY™
Level 3 (32-bit System Interface
(clocked up to 104 MHz) for Packet
over SONET (POS) or ATM
applications.
• Supports independent loop-timed
operation for each transmit serial
stream.
UTOPIA L3/
Transmit Transmit
POS-PHY
Transmit channel ATM/POS Transmit
X-Bar Assigner processor FIFO
Transmit
(4) (4)
UTOPIA L3/
Receive Receive
POS-PHY
Receive
channel ATM/POS Receive
X-Bar
Assigner processor FIFO
(4) (4)
Microprocessor JTAG
Interface Interface
© Copyright PMC-Sierra, Inc. 2003
PM5354
PL3/UL3
STPA
TCA/PTPA
TADR[3:0]
TENB
TSX
L3
TSOC/TSOP
TEOP
TDAT[31:0]
Interface
TPRTY
TMOD[1:0]
TERR
TFCLK
PL3EN
RADR[3:0]
RENB
RFCLK
RDAT[31:0]
RCA/RVAL
L3
RPRTY
Receive
RSX
Interface
RSOC/RSOP
REOP
RMOD[1:0]
RERR