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Yamaha Portatone PSR-S700 Service Manual page 31

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HD6417709SHF200BV (X2687B00) CPU (SH3) (PSR-S900)
PIN
NAME
I/O
NO.
1
MD1
Mode control
2
MD2
3
Vcc(R C)
-
Power supply +1 8 V
4
X AL2
O
Crystal oscillator
5
EX AL2
6
Vss(R C)
-
Ground
7
NM
Non-maskable interrupt request
8
IRQ0/IRL0/PTH0
9
IRQ1/IRL1/PTH1
10
IRQ2/IRL2/PTH2
nterrupt request / Port H
11
IRQ3/IRL3/PTH3
12
RQ4/P H4
13
D31/P B7
/O
14
D30/P B6
/O
15
D29/P B5
/O
Data bus / Port B
16
D28/P B4
/O
17
D27/P B3
/O
18
D26/P B2
/O
19
VssQ
-
Ground
20
D25/P B1
/O
Data bus / Port B
21
VccQ
-
Power supply +3 3 V
22
D24/P B0
/O
Data bus / Port B
23
D23/P A7
/O
24
D22/P A6
/O
Data bus / Port A
25
D21/P A5
/O
26
D20/P A4
/O
27
Vss
-
Ground
28
D19/P A3
/O
Data bus / Port A
29
Vcc
-
Power supply +1 8 V
30
D18/P A2
/O
31
D17/P A1
/O
Data bus / Port A
32
D16/P A0
/O
33
VssQ
-
Ground
34
D15
/O
Data bus
35
VccQ
-
Power supply +3 3 V
36
D14
/O
37
D13
/O
38
D12
/O
39
D11
/O
40
D10
/O
Data bus
41
D9
/O
42
D8
/O
43
D7
/O
44
D6
/O
45
VssQ
-
Ground
46
D5
/O
Data bus
47
VccQ
-
Power supply +3 3 V
48
D4
/O
49
D3
/O
50
D2
/O
Data bus
51
D1
/O
52
D0
/O
53
A0
O
54
A1
O
Address bus
55
A2
O
56
A3
O
57
VssQ
-
Ground
58
A4
O
Address bus
59
VccQ
-
Power supply +3 3 V
60
A5
O
61
A6
O
62
A7
O
63
A8
O
64
A9
O
Address bus
65
A10
O
66
A11
O
67
A12
O
68
A13
O
69
VssQ
-
Ground
70
A14
O
Address bus
71
VccQ
-
Power supply +3 3 V
72
A15
O
73
A16
O
74
A17
O
75
A18
O
Address bus
76
A19
O
77
A20
O
78
A21
O
79
Vss
-
Ground
80
A22
O
Address bus
81
Vcc
-
Power supply +1 8 V
82
A23
O
Address bus
83
VssQ
-
Ground
84
A24
O
Address bus
85
VccQ
-
Power supply +3 3 V
86
A25
O
Address bus
87
BS/P K4
/O
Bus cycle / Port K
88
RD
O
Read strobe
89
WE0/DQMLL
O
Select signal (D7-D0) / D QM (SDRAM)
90
WE1/DQMLU/WE
O
Select signal (D15-D8) / D QM (SDRAM) / Write enable
91
/O
Select signal (D23-D16) / D QM (SDRAM) / I/O read / Port K
WE2/DQMUL/ICIORD/PTK6
92
/O
Select signal (D31-D24) / D QM (SDRAM) / I/O write / Port K
WE3/DQMUU/ISIOWR PTK7
93
RD/WR
O
Read / Write
94
AUDSYNC/PTE7
/O
AUD cycle / Port E
95
VssQ
-
Ground
96
CS0/MCS0
O
Chip select / Mask ROM chip select
97
VccQ
-
Power supply +3 3V
98
CS2/P K0
/O
99
CS3/P K1
/O
Chip select / Port K
100
CS4/P K2
/O
101
CS5/CE1A/PTK3
/O
Chip select / Chip enable / Port K
102
CS6/CE1B
O
Chip select / Chip enable
103
CE2A/P E4
/O
Chip enable / Port E
104
CE2B/P E5
/O
PIN
FUNCTION
NO.
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
NAME
I/O
CKE/P K5
/O
CK enable / Port K
RAS3L/PTJ0
/O
RAS address bus / Port J
P J1
/O
Port J
CASL/P J2
/O
CAS address bus / Port J
VssQ
-
Ground
CASU/P J3
/O
CAS address bus / Port J
VccQ
-
Power supply +3 3 V
P J4
/O
Port J
P J5
/O
DACK0/PTD5
/O
DMA acknowledge / Port D
DACK1/PTD7
/O
P E6
/O
Port E
P E3
/O
RAS3U/PTE2
/O
RAS address bus / Port E
P E1
/O
Port E
DO/P E0
/O
est data / Port E
BACK
O
Bus acknowledge
BREQ
Bus request
WA
Hardware wait request
RESE M
Manual reset
ADTRG/PTH5
Analog trigger / Port H
IOIS16/PTG7
Write protect / Port G
ASEMD0/PTG6
ASE mode / Port G
ASEBRKAK/PTG5
/O
ASE break acknowledge / Port G
PTG4/CKIO2
/O
Port G / Clock output
AUDATA3/PTG3
/O
AUD data / Port G
AUDATA2/PTG2
/O
Vss
-
Ground
AUDATA1/PTG1
/O
AUD data / Port G
Vcc
-
Power supply +1 8 V
AUDATA0/PTG0
/O
AUD data / Port G
TRST/PTF7/PINT15
est reset / Port
TMS/PTF6/PINT14
est mode switch / Port
TDI/PTF5/PINT13
est data / Port
TCK/PTF4/PINT12
est clock / Port
IRLS3/PTF3/PINT11
IRL2/PTF2/PINT10
nterrupt request / Port
IRLS1/PTF1/PINT9
IRLS0/PTF0/PINT8
MD0
Mode control
Vcc(PLL1)
-
Power supply +1 8 V
CAP1
-
Capacitor
Vss(PLL1)
-
Ground
Vss(PLL2)
-
Ground
CAP2
-
Capacitor
VCC(PLL2)
-
Power supply +1 8 V
AUDCK/PTH6
AUD clock / Port H
Vss
-
Ground
Vss
-
Vcc
-
Power supply +1 8 V
X AL1
O
Crystal oscillator
EX AL1
STATUS0/PTJ6
/O
Processor status / Port J
STATUS1/PTJ7
/O
CLK/P H7
/O
imer clock / Port H
/ RQOU
O
nterrupt request output
VssQ
-
Ground
CK O
/O
System clock input / output
VccQ
-
Power supply +3 3 V
TXD0/SCPT0
O
Data transmission / SC port
SCK0/SCPT1
/O
Serial clock / SC port
TXD1/SCPT2
O
Data transmission / SC port
SCK1/SCPT3
/O
Serial clock / SC port
TXD2/SCPT4
O
Data transmission / SC port
SCK2/SCPT5
/O
Serial clock / SC port
RTS2/SCPT6
/O
ransmit request / SC port
RXD0/SCPT0
Data reception / SC port
RXD1/SCPT2
Vss
-
Ground
RXD2/SCPT4
Data reception / SC port
Vcc
-
Power supply +1 8 V
CTS2/IRQ5/SCPT7
ransmit clear / nterrupt request / SC port
MCS7/PTC7/PINT7
/O
MCS6/PTC6/PINT6
/O
Mask ROM chip select / Port C / Port interruption
MCS5/PTC5/PINT5
/O
MCS4/PTC4/PINT4
/O
VssQ
-
Ground
WAKEUP/PTD3
/O
Standby mode nterrupt request output / Port D
VccQ
-
Power supply +3 3 V
RESETOUT/PTD2
/O
Reset output / Port D
MCS3/PTC3/PINT3
/O
MCS2/PTC2/PINT2
/O
Mask ROM chip select / Port C / Port interruption
MCS1/PTC1/PINT1
/O
MCS0/PTC0/PINT0
/O
DRAK0/PTD1
/O
DMA acknowledge / Port D
DRAK1/PTD0
/O
DREQ0/PTD4
DMA request / Port D
DREQ1/PTD6
RESE P
Power on reset
CA
Chip active
MD3
MD4
Mode control
MD5
AVss
-
Analog ground
AN0/P L0
AN1/P L1
AN2/P L2
Analog input / Port L
AN3/P L3
AN4/P L4
AN5/P L5
AVcc
-
Analog power supply +3 3 V
AN6/DA1/PTL6
/O
Analog input / Analog output / Port L
AN7/DA0/PTL7
/O
AVss
-
Analog ground
PSR-S700/PSR-S900
DM: IC305
FUNCTION
/ Port interruption
/ Port interruption
/ Port interruption
/ Port interruption
/ Port interruption
31

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