Description Of Major Ics - JVC XV-C5SL Service Manual

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4.1
74LVC373APW-X (IC512, IC513) : Octal D-type transparet latch
• Pin Layout
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
10
(TOP VIEW)
• Truth table
Operating modes
Enable and read register
(trasparant mode)
Latch and read register
Latch register and
disable outputs
H=HIGH Voltage Levelh=HIGH Voltage level one setup time prior to the HIGH-to-LOW LE transitionL=LOW Vlotage Levell=LOW
Voltage level one setup time prior to the HIGH-to-LOW LE transitionX=Don't careZ=High Impedance OFF-state
• Block Diagram
11
LE
1
OE
1-26 (No.XA001)

Description of major ICs

1
20
VCC
2
19
Q7
3
18
D7
4
17
D6
5
16
Q6
6
15
Q5
7
14
D5
8
13
D4
9
12
Q4
11
LE
Inputs
Internal latches
OE
LE
Dn
L
H
L
L
H
H
L
L
l
L
L
h
H
L
l
H
L
h
D0
D1
3
4
D
Q
D
LE
LE
LE
LE
2
Q0
SECTION 4
• Pin function
Symbol
D0-D7
Data Inputs
LE
Latch enable Input (active-high)
OE
Output enable Input (active-low)
Q0-Q7
Data outputs
GND
Connect to ground
Vcc
Power supply
Outputs
Q0 to Q7
L
L
H
H
L
H
H
H
L
Z
H
Z
D2
D3
D4
7
8
13
14
Q
D
Q
D
Q
D
Q
LE
LE
LE
LE
LE
LE
5
6
9
12
Q1
Q2
Q3
Q4
Description
D5
D6
D7
17
18
D
Q
D
Q
D
Q
LE
LE
LE
LE
LE
LE
15
16
19
Q5
Q6
Q7

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