Quadruple Boosting - Epson S1F76540M0C Series Technical Manual

9. REFERENCE: EXTERNAL CONNECTION EXAMPLES

9.4 Quadruple Boosting

Run only the booster, perform quadruple boosting in the negative direction for input voltage VI, and generate
the voltage in the VO pin.
In this case, the regulator is not used, so the voltage containing ripple components is generated in the VO pin.
Figure 9.4 shows a connection example.
VO
V
DD
VI
Figure 9.4 Setting conditions
Internal clock
Booster
Regulator
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
About ripple voltage
The output voltage to be generated in the VO pin is not stabilized; therefore, it contains the ripple
components shown in Figure 9.5. The ripple voltage VRP increases depending on the load current, and the
approximate value can be obtained in expression (9.1).
VO waveform
VRP＝
IO
fCL
RCO
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
22
CO
+
1
2
3
4
5
+
6
CI
7
8
Figure 9.4 Quadruple boosting connection example
: ON (Low output mode)
: ON
: OFF
Figure 9.5 Ripple waveform chart
IO
+
2・fCL・CO
: Load current (A)
: Clock frequency (Hz)
: Serial equivalent resistance (Ω) of output capacitor CO
EPSON
VO C2P 16
1
VRI C2N 15
V C3N 14
REG
RV C1N 13
V C1P 12
DD
FC VI 11
TC1 POFF1X 10
TC2 POFF2X 9
IO × RCO
Expression (9.1)
S1F76540M0C Series Technical Manual
+
C2
C3
C1
+
+
VRP
(Rev.1.1)