Sony VPL-HS20 Service Manual page 104

FROM P4
GBLKSPL,GCOAST,GREF
1
TO B(1)
GND
A1
GND
B1
GCOAST
GCOAST
A2
TO P4
GND
B2
GSYNC
GBLKSPL
GBLKSPL
A3
GND B3
GREF
GREF A4
GND B4
GPENSOG A5 GPENSOG TO P1
GND B5
GHS1 TO P4
GHS1 A6
GVS1
GVS1 B6
GND A7
GND B7
GCLK1
2 GCLK1
A8
GND B8
GND A9
JL100
N.C B9
GND A10
GND B10
GBO[0]
GBO0
A11
GBO[1]
GBO1 B11
GBO[2]
GBO2 A12
GBO[3]
GBO3 B12
GBO[4]
GBO4
A13
GBO[5]
GBO5 B13
GBO[6]
GBO6
A14
GBO[7]
B14
GBO7
B
GBE[0]
GBE0 A15
GBE[1]
GBE1 B15
GBE[2]
GBE2 A16
3 GBE[3]
GBE3 B16
GBE[4]
TO
GBE4 A17
B BOARD
GBE[5]
GBE5 B17
CN152
GBE[6]
GBE6 A18
GBE[7]
GBE7 B18
GGO[0]
GGO0 A19
GGO[1]
GGO1 B19
GGO[2]
GGO2 A20
GGO[3]
GGO3 B20
GGO[4]
GGO4 A21
GGO[5]
GGO5 B21
GGO[6]
GGO6 A22
GGO[7]
GGO7 B22
G
GGE[0]
GGE0 A23
GGE[1]
GGE1 B23
GGE[2]
GGE2 A24
GGE[3]
GGE3 B24
4
GGE[4]
GGE4 A25
GGE[5]
GGE5 B25
GGE[6]
A26
GGE6
GGE[7]
GGE7 B26
GRO[0]
GRO0 A27
GRO[1]
GRO1 B27
GRO[2]
GRO2 A28
GRO[3]
GRO3 B28
GRO[4]
GRO4 A29
GRO[5]
GRO5 B29
GRO[6]
GRO6 A30
GRO[7]
GRO7 B30
R
GRE[0]
GRE0 A31
GRE[1]
GRE1 B31
GRE[2]
GRE2 A32
GRE[3]
GRE3 B32
GRE[4]
5 GRE4
A33
GRE[5]
GRE5 B33
GRE[6]
GRE6
A34
GRE[7]
GRE7 B34
GND
A35
GND B35
CN100
GND_1
70P
A B
GBUS1
C
C (1/9) C (1/9)
TO B(2)
GND A1
GND
B1
GND
A2
GND
B2
GND
A3
GND B3
GND A4
GND B4
SCL_PW
A5 SCL_PW
FROM/TO P2/P9
GND B5 TO P4
CPU2
SDA_PW A6 SDA_PW
GND B6
SW[0]
SW0 A7
SW[1]
SW1 B7
SW[2]
SW2 A8
SW[3]
SW3 B8
MS_H A9
MS_V B9
PC_DTV A10 PC_DTV
/DEC_RESET B10 DEC_RESET
/DEC_EN A11 DEC_EN
ADC_EN
/ADC_EN B11 TO P2
TMDS_EN
/TMDS_EN A12 TMDS_EN
H_POL
H_POL B12
V_POL
V_POL A13
JL103
N.C B13
FROM P9
HDMI_DTV
HDMI_DTV A14
B14 HDMI_INT FROM P1
HDMI_INT
GND A15
HSI B15 HSI
TO P2/P5
GND A16 TO P2
I2C_400
VSI B16 VSI
TO
GND A17 TO P2/P9
B BOARD
I2C_100
GND B17
CN153
SCL_400K
SCL_400K A18
SDA_400K
SDA_400K B18
SCL_100K
SCL_100K A19
SDA_100K
SDA_100K B19
SCL_USB
SCL_USB A20
SDA_USB
SDA_USB B20
USB_REQ
USB_REQ A21
GND B21
GND A22
RXD
RXD B22
TXD
TXD A23
MD2 TO P2
MD2 B23
RES A24 CPU_RES
DDC_WC
DDC_WC B24
DDC_SW1
DDC_SW1 A25
SSC_SW0 B25 DDC_SW0
A26 DVI_PIXS
DVI_PIXS
SCL_E B26 SCL_E
SDA_E A27 SDA_E
RESET_E B27 RESET_E FROM/TO P2 TO P2
I2C_100_2
DDC_POWER A28 DDC_POWER TO P2
GND B28
GND A29
SCL_100_2
SCL_100K_2 B29
GND A30
SDA_100_2
SDA_100K_2 B30
GND A31
GND B31
JL110
TO P2/P3
LAMP A32 LAMP_COVER
GND B32
JL111
FILTER FILT_COVER TO P2
A33
SUB_5V-4
GND B33
SUB5V JL102
A34
SUB5V B34
GND
A35
JL101
GND B35
CN101
70P
GND_1
6-18 6-18
D E
MS_VCLK MS_V
MS_VPEN MS_H
TP100 TP102 TP103 TP104
MS_VCLK
MS_VPEN
TO P4
MS_V
MS_H
JL104
MSAU_L
JL105
TO P9
GND_1
JL106
MSAU_R
VUV[7]
VUV[6]
VUV[5]
VUV[4]
VUV[3]
VUV[2]
VUV[1]
VUV[0]
VY[7]
VY[6]
VY[5]
VY[4]
VY[3]
VY[2]
VY[1]
6.4V
VY[0]
TO P4
V_PORT
+6.4V
FB100
0uH
D_3.3V
D_3.3V
TP101
+3.3V
FB101
0uH
SUB_3.3V-2
JL108
JL109
+3.3V
MS_EN
FROM P2
MENU_STATUS
FROM P2/P3 SIRCS
BRD_ST
FROM P2
TXD_MS
JL107
FROM P2
RXD_MS
MS_RESET
KEY[0]
GND_1
C
(1/9)
MAIN CPU,SCAN CONVERTER,
3D GAMMA & TG,LCD DRIVER
F G
TO MS
1 GND
2 GND
3 VCLK
4 VPEN
5 VVS
6 VHS
7 AU_GND
8 MSAU_L
9 AU_GND
10 MSAU_R
11 GND
12 GND
13 VUV(7)
14 VUV(6)
15 VUV(5)
16 VUV(4)
17 VUV(3)
18 VUV(2)
19 VUV(1)
20 VUV(0)
21 VY(7)
22 VY(6)
23 VY(5)
24 VY(4)
TO
25 VY(3)
MS BOARD
26 VY(2) CN1001
27 VY(1)
28 VY(0)
29 GND
30 6.4V
31 GND
32 GND
33 GND
34 D3.3V
35 D3.3V
36 D3.3V
37 GND
38 SUB_3.3V
39 MS_SW
40 MS_EN
41 MENU_STSTUS
42 SIRCS
43 BRD_STATUS
44 NC
45 TXD-MS
46 PIC_MUTE_MS
47 RXD_MS
48 MS_RESET
49 KEY0_MS
50 GND
CN102
50P
B-SS1757-C-P1
VPL-HS20
H