Sharp HT-CN150DVW Service Manual page 72

Table 1 ES6629 Pin Description
Name
VD33 1,10,19,35,44,53,62,79,96,126,185
VID_XI
VID_XO
CLK
DMA [11:0]
VS33 9,18,34,43,52,61,78,95,119,127,186,208
DCAS#
DCS[1:0]#
DRAS[2:0]#
VSS
VDD
DSCK_EN
DOE#
DWE#
DB[15:0]
DSCK
DQM
LA[21:0] 56:60, 63:69. 72:77, 80:82
LCS[3:0]#
LWRLL#
LOE#
LD[7:0]
RSD
RBCK
RWS
VD33_PL
VS33_PL
VREF
YUV1
COMP
YUV3
RSET
YUV4
FDAC
YUV7
VDAC
YUV6
VD33_DA
VS33_DA
YDAC
YUV5
CDAC
YUV2
Pin Numbers
2
3
4
5:8 11:17, 20
21
22,23
24,25,28
26,70,86,137,197
27,71,87,138,198
29
30
31:33,36:42,45:50
51
54
83:85,88
89
90
91:94, 97:100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
I/O
P I/O power supply.
I Crystal input.
O Crystal output.
I System clock.
O DRAM address bus.
G Ground for I/O power supply.
O DRAM column address strobe (active-low).
O DRAM chip select (active-low).
O DRAM row address strobe (active-low).
G Ground for core power supply.
P Core power supply.
O DRAM clock enable output.
O DRAM output enable (active-low).
O DRAM write enable (active-low).
I/O DRAM data bus.
O Output clock to DRAM.
O Data input/output mask.
O RISC port address bus.
O RISC port chip select (active-low).
O RISC port low-byte write enable (active-low).
O RISC port output enable (active-low).
I/O RISC port data bus; (5V tolerant input).
I Audio receive serial data; (5V tolerant input).
I Audio receive bit clock; (5V tolerant input).
I Audio receive frame sync; (5V tolerant Input).
P Power for PLL block.
G Ground for PLL block.
I Internal voltage reference to video DAC.
O YUV pixel 1 output data.
I Compensation input.
O YUV pixel 3 output data.
I DAC current adjusment resistor input.
O YUV pixel 4 output data.
O Video DAC output. Refer to description and matrix for UDAC pin 115.
O YUV pixel 7 output data.
O Video DAC output. Refer to description and matrix for UDAC pin 115.
O YUV pixel 6 output data.
P Power for I/O power supply for VDAC.
G Ground for I/O power supply for VDAC.
O Video DAC output. Refer to description and matrix for UDAC pin 115.
O YUV pixel 5 output data.
O Video Dac output. Refer to description and matrix for UDAC pin 115.
O YUV pixel 2 output data.
72
HT-CN150DVW
Definition