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Texas Instruments CC430F6137 Manual
Texas Instruments CC430F6137 Manual

Texas Instruments CC430F6137 Manual

Msp430 soc with rf core

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ECCN 5E002 TSPA - Technology / Software Publicly Available
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FEATURES
1
• True System-on-Chip (SoC) for Low-Power
23
Wireless Communication Applications
Wide Supply Voltage Range:
3.6 V Down to 1.8 V
Ultralow-Power Consumption:
– CPU Active Mode (AM): 160 µA/MHz
– Standby Mode (LPM3 RTC Mode): 2.0 µA
– Off Mode (LPM4 RAM Retention): 1.0 µA
– Radio in RX: 15 mA, 250 kbps, 915 MHz
MSP430 System and Peripherals
– 16-Bit RISC Architecture, Extended
Memory, up to 20-MHz System Clock
– Wake Up From Standby Mode in Less
Than 6 µs
– Flexible Power-Management System With
SVS and Brownout
– Unified Clock System With FLL
– 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
– 16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
– Hardware Real-Time Clock (RTC)
– Two Universal Serial Communication
Interfaces
– USCI_A0 Supports UART, IrDA, SPI
– USCI_B0 Supports I
– 12-Bit Analog-to-Digital Converter (ADC)
With Internal Reference, Sample-and-Hold,
and Autoscan Features (CC430F613x and
CC430F513x Only)
– Comparator
– Integrated LCD Driver With Contrast
Control for up to 96 Segments
(CC430F61xx Only)
– 128-Bit AES Security Encryption and
Decryption Coprocessor
– 32-Bit Hardware Multiplier
– Three-Channel Internal DMA
– Serial Onboard Programming, No External
Programming Voltage Needed
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MSP430 is a trademark of Texas Instruments.
2
All other trademarks are the property of their respective owners.
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
MSP430™ SoC With RF Core
2
C, SPI
CC430F5137, CC430F5135, CC430F5133
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
– Embedded Emulation Module (EEM)
High-Performance Sub-1-GHz RF Transceiver
Core
– Same as in CC1101
– Wide Supply Voltage Range: 2.0 V to 3.6 V
– Frequency Bands: 300 MHz to 348 MHz,
389 MHz to 464 MHz, and 779 MHz to
928 MHz
– Programmable Data Rate From 0.6 kBaud
to 500 kBaud
– High Sensitivity (–117 dBm at 0.6 kBaud,
–111 dBm at 1.2 kBaud, 315 MHz,
1% Packet Error Rate)
– Excellent Receiver Selectivity and Blocking
Performance
– Programmable Output Power Up to
+12 dBm for All Supported Frequencies
– 2-FSK, 2-GFSK, and MSK Supported as
Well as OOK and Flexible ASK Shaping
– Flexible Support for Packet-Oriented
Systems: On-Chip Support for Sync Word
Detection, Address Check, Flexible Packet
Length, and Automatic CRC Handling
– Support for Automatic Clear Channel
Assessment (CCA) Before Transmitting (for
Listen-Before-Talk Systems)
– Digital RSSI Output
– Suited for Systems Targeting Compliance
With EN 300 220 (Europe) and
FCC CFR Part 15 (US)
– Suited for Systems Targeting Compliance
With Wireless M-Bus Standard EN
13757‑ ‑ 4:2005
– Support for Asynchronous and
Synchronous Serial Receive or Transmit
Mode for Backward Compatibility With
Existing Radio Communication Protocols
Table 1
Summarizes Family Members
For Complete Module Descriptions, See the
CC430 Family User's Guide (SLAU259)
Copyright © 2009–2013, Texas Instruments Incorporated
CC430F5133

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Summary of Contents for Texas Instruments CC430F6137

  • Page 1 Programming Voltage Needed Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MSP430 is a trademark of Texas Instruments.
  • Page 2 Smart Grid Wireless Networks DESCRIPTION The Texas Instruments CC430 family of ultralow-power microcontroller system-on-chip (SoC) with integrated RF transceiver cores consists of several devices featuring different sets of peripherals targeted for a wide range of applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications.
  • Page 3 5 and the second instantiation having 3 capture compare registers and PWM output generators, respectively. (4) n/a = not available Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 4 5 CC 3 CC Segments TX & RX En-/De- SVM/SVS Registers Registers USCI_B0 1,2,3,4 cryption Brownout (SPI, I2C) RF_P RF_N Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 5 NOTE: The secondary digital functions on ports P1, P2, and P3 are fully mappable. This pinout shows only the default mapping. See Table 9 for details. CAUTION: The LCDCAP/R33 must be connected to VSS if not used. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 6 5 CC 3 CC Segments TX & RX En-/De- SVM/SVS Registers Registers USCI_B0 1,2,3,4 cryption Brownout (SPI, I2C) RF_P RF_N Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 7 NOTE: The secondary digital functions on ports P1, P2, and P3 are fully mappable. This pinout shows only the default mapping. See Table 9 for details. CAUTION: The LCDCAP/R33 must be connected to VSS if not used. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 8 RTC_A Security 5 CC 3 CC TX & RX En-/De- Registers Registers SVM/SVS USCI_B0 cryption Brownout (SPI, I2C) RF_P RF_N Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 9 NOTE: The secondary digital functions on ports P1, P2, and P3 are fully mappable. This pinout shows only the default mapping. See Table 9 for details. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 10 Default mapping: TA0 CCR2 compare output or capture input LCD segment output S13 (1) I = input, O = output Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 11 General-purpose digital I/O PJ.3/ TCK Test clock Test mode pin – select digital I/O on JTAG pins TEST/ SBWTCK Spy-Bi-Wire input clock Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 12 The exposed die attach pad must be connected to a solid ground plane as this is the ground connection for the chip. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 13 Input terminal for RF crystal oscillator, or external clock input RF_XOUT Output terminal for RF crystal oscillator AVCC_RF Radio analog power supply (1) I = input, O = output Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 14 The exposed die attach pad must be connected to a solid ground plane as this is the ground connection for the chip. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 15 The digital baseband includes support for channel configuration, packet handling, and data buffering. For complete module descriptions, see the CC430 Family User's Guide (SLAU259). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 16 – MCLK, FLL loop control, and DCOCLK are disabled – DCO's dc-generator is disabled – Crystal oscillator is stopped – Complete data retention Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 17 (4) Reserved interrupt vectors at addresses are not used in this device and can be used for regular program code if necessary. To maintain compatibility with other devices, it is recommended to reserve these locations. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 18 BSL FUNCTION RST/NMI/SBWTDIO Entry sequence signal TEST/SBWTCK Entry sequence signal P1.6 Data transmit P1.5 Data receive Power supply Ground supply Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 19 Segments Info A to Info D can be erased individually, or as a group with the main memory segments. Segments Info A to Info D are also called information memory. • Segment A can be locked separately. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 20 Read/write access to port-control registers is supported by all instructions. • Ports can be accessed byte-wise (P1 through P5) or word-wise in pairs (PA and PB). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 21 (5) UCB0CLK function takes precedence over UCA0STE function. If the mapped pin is required as UCB0CLK input or output USCI_A0 will be forced to 3-wire SPI mode even if 4-wire mode is selected. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 22 TA0 CCR4 capture input CCI4A TA0 CCR4 compare output Out4 P3.6/P3MAP6 PM_RFGDO1 None Radio GDO1 P3.7/P3MAP7 PM_SMCLK None SMCLK output Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 23 14h to 1Eh Lowest SYSUNIV, User NMI 019Ah No interrupt pending NMIFG Highest OFIFG ACCVIFG Reserved 08h to 1Eh Lowest Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 24 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 25 The USCI_Bn module provides support for SPI (3 or 4 pin) and I2C. A USCI_A0 and USCI_B0 module are implemented. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 26 (1) If a different RFCLK divider setting is selected for a radio GDO output, this divider setting is also used for the Timer_A INCLK. (2) Only on CC430F613x and CC430F513x Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 27 The primary function of the Comparator_B module is to support precision slope analog-to-digital conversions, battery voltage supervision, and monitoring of external analog signals. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 28 Up to four hardware triggers can be combined to form complex triggers or breakpoints • One cycle counter • Clock control on module level Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 29 AES Accelerator (see Table 09C0h 000h-00Fh LCD_B (see Table 0A00h 000h-05Fh (only CC430F613x and CC430F612x) Radio Interface (see Table 0F00h 000h-03Fh Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 30 UCS control 4 UCSCTL4 UCS control 5 UCSCTL5 UCS control 6 UCSCTL6 UCS control 7 UCSCTL7 UCS control 8 UCSCTL8 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 31 Port P2.4 mapping register P2MAP4 Port P2.5 mapping register P2MAP5 Port P2.6 mapping register P2MAP6 Port P2.7 mapping register P2MAP7 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 32 Port P4 output P4OUT Port P4 direction P4DIR Port P4 pullup/pulldown enable P4REN Port P4 drive strength P4DS Port P4 selection P4SEL Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 33 Capture/compare register 0 TA1CCR0 Capture/compare register 1 TA1CCR1 Capture/compare register 2 TA1CCR2 TA1 expansion register 0 TA1EX0 TA1 interrupt vector TA1IV Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 34 32 × 32 result 2 RES2 32 × 32 result 3 – most significant word RES3 MPY32 control register 0 MPY32CTL0 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 35 DMA channel 2 destination address low DMA2DAL DMA channel 2 destination address high DMA2DAH DMA channel 2 transfer size DMA2SZ Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 36 USCI I2C own address UCB0I2COA USCI I2C slave address UCB0I2CSA USCI interrupt enable UCB0IE USCI interrupt flags UCB0IFG USCI interrupt vector word UCB0IV Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 37 Conversion memory 11 ADC12MEM11 Conversion memory 12 ADC12MEM12 Conversion memory 13 ADC12MEM13 Conversion memory 14 ADC12MEM14 Conversion memory 15 ADC12MEM15 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 38 LCDM14 02Dh LCD_B blinking memory 1 LCDBM1 040h LCD_B blinking memory 2 LCDBM2 041h LCD_B blinking memory 14 LCDBM14 04Dh Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 39 RF1AIFG Radio core interrupt edge select register RF1AIES Radio core interrupt enable register RF1AIE Radio core interrupt vector word RF1AIV Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 40 SVS ensuring reliable operation. (5) A capacitor tolerance of ±20% or better is required. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 41 0, 1, 2, 3 Supply Voltage - V The numbers within the fields denote the supported PMMCOREVx settings. Figure 2. Maximum System Frequency Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 42 Typical Characteristics - Active Mode Supply Currents Active Mode Supply Current MCLK Frequency = 3.0 V PMMVCOREx=3 PMMVCOREx=2 PMMVCOREx=1 PMMVCOREx=0 MCLK Frequency - MHz Figure 3. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 43 (8) CPUOFF = 1, SCG0 = 1, SCG1 = 1, OSCOFF = 1 (LPM4); f = 0 MHz ACLK MCLK SMCLK Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 44 PMMCOREVx = 0 PMMCOREVx = 0 - Free-Air Tem perature - °C - Free-Air Tem perature - °C Figure 4. Figure 5. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 45 = 3 V typ.), LCDSSEL=0, LCDPREx=101, LCDDIVx=00011 (f = 32768 Hz/32/4 = 256 Hz) Even segments S0, S2,...=0, odd segments S1, S3,...=1. No LCD panel load. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 46 (3) An external signal sets the interrupt flag every time the minimum interrupt pulse duration t is met. It may be set by trigger signals (int) shorter than t (int) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 47 = 20 pF is connected to the output to V (5) The output voltage reaches at least 10% and 90% V at the specified toggle frequency. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 48 - High-Level Output Voltage - V Figure 8. Figure 9. Typical Characteristics - Outputs, Full Drive Strength (PxDS.y = 1) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 49 = 25°C = 25°C - High-Level Output Voltage - V - High-Level Output Voltage - V Figure 12. Figure 13. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 50 Frequencies between the MIN and MAX specifications might set the flag (8) Measured with logic-level input frequency but also applies to operation with crystals. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 51 (2) Calculated using the box method: (MAX(1.8 to 3.6 V) – MIN(1.8 to 3.6 V)) / MIN(1.8 to 3.6 V) / (3.6 V – 1.8 V) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 52 Typical DCO Frequency, V = 3.0 V, T = 25°C DCOx = 31 DCOx = 0 DCORSEL Figure 14. Typical DCO frequency Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 53 VCORE (PMMCOREVx) setting. See the Power Management Module and Supply Voltage Supervisor chapter in the CC430 Family User's Guide (SLAU259) on recommended settings and usage. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 54 VCORE (PMMCOREVx) setting. See the Power Management Module and Supply Voltage Supervisor chapter in the CC430 Family User's Guide (SLAU259) on recommended settings and usage. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 55 LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the CC430 Family User's Guide (SLAU259). (3) This value represents the time from the wake-up event to the reset vector execution. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 56 Duty cycle = 50% ± 10% All capture inputs, Timer_A capture timing Minimum pulse duration required for 1.8 V, 3 V TA,cap capture. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 57 SIMO output can become invalid before the output changing clock edge observed on UCLK. See the timing diagrams in Figure 15 Figure Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 58 UCLK CKPL = 1 LO/HI LO/HI HD,MI SU,MI SOMI HD,MO VALID,MO SIMO Figure 16. SPI Master Mode, CKPH = 1 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 59 (3) Specifies how long data on the SOMI output is valid after the output changing UCLK clock edge. See the timing diagrams in Figure 15 Figure Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 60 CKPL = 1 LO/HI LO/HI HD,SI SU,SI SIMO HD,MO STE,ACC STE,DIS VALID,SO SOMI Figure 18. SPI Slave Mode, CKPH = 1 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 61 Pulse duration of spikes suppressed by input filter HD,STA SU,STA HD,STA HIGH SU,DAT SU,STO HD,DAT Figure 19. I2C Mode Timing Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 62 Voltage difference between LCDCPEN = 0, R0EXT=1 +0.2 and R03 External LCD reference voltage applied at VLCDREFx = 01 LCDREF/R13 LCDREF/R13 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 63 LCD driver output LCDCPEN = 1, VLCDx = 1000, 2.2 V kΩ LCD,COM impedance, common lines = ±10 µA LOAD Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 64 ) x (R ) × C + 800 ns, where n = ADC resolution = 12, R = external source resistance Sample Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 65 (4) The gain error and total unadjusted error are dominated by the accuracy of the integrated reference module absolute accuracy. In this mode the reference voltage used by the ADC12_A is not available on a pin. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 66 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 Ambient Temperature - ˚C Figure 20. Typical Temperature Sensor Voltage Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 67 (5) Two decoupling capacitors, 10 µF and 100 nF, should be connected to VREF to decouple the dynamic current required for an external reference source if it is used for the ADC12_A. See also the CC430 Family User's Guide (SLAU259). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 68 (6) The condition is that the error in a conversion started after t is less than ±0.5 LSB. The settling time depends on the external REFON capacitive load when REFOUT = 1. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 69 VIN = reference into resistor ladder, Reference voltage for a given tap VIN × (n+1) / 32 CB_REF n = 0 to 31 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 70 SBWTCK clock edge. (2) f may be restricted to meet the timing requirements of the module selected. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 71 (2) This current consumption is also representative of other intermediate states when going from IDLE to RX or TX, including the calibration state. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 72 See tables "RF Receive" for additional details on current consumption and sensitivity. (3) For 868 or 915 MHz, see Figure 21 for current consumption with register settings optimized for sensitivity. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 73 250 kBaud GFSK 500 kBaud MSK Figure 21. Typical RX Current Consumption Over Temperature and Input Power Level, 868 MHz, Sensitivity-Optimized Setting Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 74 (2) Reduced current setting (MDMCFG2.DEM_DCFILT_OFF = 1) gives a slightly lower current consumption at the cost of a reduction in sensitivity. See tables "RF Receive" for additional details on current consumption and sensitivity. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 75 0x8D 17.8 17.4 17.1 18.1 17.6 17.3 18.2 17.8 17.5 0x2D 17.0 16.9 16.9 17.7 17.6 17.6 18.1 18.0 18.0 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 76 2mA close to the sensitivity limit. The sensitivity is typically reduced to -101dBm. (4) MDMCFG2.DEM_DCFILT_OFF=1 can not be used for data rates ≥ 250kBaud. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 77 Figure 24 for blocking performance at other offset frequencies. (9) See Figure 25 for blocking performance at other offset frequencies. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 78 NOTE: 868 MHz, 2-FSK, 20 kHz deviation, IF frequency is 152.3 kHz, digital channel filter bandwidth is 100 kHz Figure 23. Typical Selectivity at 38.4-kBaud Data Rate Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 79 NOTE: 868 MHz, 2-FSK, IF frequency is 355 kHz, digital channel filter bandwidth is 812 kHz Figure 25. Typical Selectivity at 500-kBaud Data Rate Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 80 85°C -109 -109 -107 -109 -109 -106 -109 -108 -105 38.4 -102 -102 -100 -102 -102 -103 -102 Sensitivity, 915MHz Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 81 (8) All radiated spurious emissions are within the limits of ETSI. Also see design note DN017 CC11xx 868/915 MHz RF Matching (SWRA168). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 82 0xC0 (1) All measurement results are obtained using the EM430F6137RF900 with BOM according to tested frequency range (see Table 48). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 83 -5.1 (1) All measurement results are obtained using the EM430F6137RF900 with BOM according to tested frequency range (see Table 48). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 84 (6) Settling time for the 1-IF frequency step from TX to RX (7) Calibration can be initiated manually or automatically before entering or after leaving RX or TX. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 85 Input Pow er [dBm ] Figure 26. Typical RSSI Value vs Input Power Level for Different Data Rates at 868 MHz Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 86 For a complete reference design including layout see the CC430 Wireless Development Tools and related documentation [MSP430 Hardware Tools User's Guide (SLAU278)]. Figure 27. Typical Application Circuit CC430F61xx Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 87 For a complete reference design including layout see the CC430 Wireless Development Tools and related documentation [MSP430 Hardware Tools User's Guide (SLAU278)]. Figure 28. Typical Application Circuit CC430F51xx Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 88 PCB stray capacitance. It can be typically estimated to be approximately 2.5 pF. (2) dnp = do not populate Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 89 P1IRQ.x P1IFG.x SEL x Interrupt Edge P1IES x . Select CC430F513x devices don't provide LCD functionality on port P1 pins. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 90 S22 (not available on CC430F513x) (1) X = don't care (2) LCDSx not available in CC430F513x. (3) According to mapped function - see Table Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 91 (3) Setting P1SEL.x bit together with P1MAPx = PM_ANALOG disables the output driver as well as the input Schmitt trigger. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 92 1: High drive P2.3/P2MAP3/CB3(/A3) P2IN.x Keeper to Port Mapping P2IE.x P2IRQ.x P2IFG.x SEL x Interrupt Edge P2IES x . Select Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 93 0: Low drive 1: High drive P2IN.x Keeper to Port Mapping P2IE.x P2IRQ.x P2IFG.x SEL x Interrupt Edge P2IES x . Select Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 94 SEL x Interrupt Edge P2IES x . Select CC430F513x devices don't provide analog functionality on port P2.6 and P2.7 pins. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 95 Selecting the CBx input pin to the comparator multiplexer with the CBx bits automatically disables output driver and input buffer for that pin, regardless of the state of the associated CBPD.x bit. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 96 P3.3/P3MAP3(/S13) P3IN.x P3.4/P3MAP4(/S14) P3.5/P3MAP5(/S15) P3.6/P3MAP6(/S16) Keeper to Port Mapping P3.7/P3MAP7(/S17) CC430F513x devices don't provide LCD functionality on port P3 pins. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 97 S17 (not available on CC430F513x) (1) X = don't care (2) LCDSx not available in CC430F513x. (3) According to mapped function - see Table Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 98 P4.0/S2 P4DS.x P4.1/S3 P4SEL.x 0: Low drive P4.2/S4 1: High drive P4.3/S5 P4IN.x P4.4/S6 P4.5/S7 Keeper P4.6/S8 Not Used P4.7/S9 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 99 6 P4.6 (I/O) I: 0; O: 1 DVSS P4.7/P4MAP7/S9 7 P4.7 (I/O) I: 0; O: 1 DVSS (1) X = don't care Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 100 DVCC P5DIR.0 P5OUT.0 Module X OUT P5.0/XIN P5DS.x P5SEL.0 0: Low drive 1: High drive P5IN.0 Keeper Module X IN Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 101 (3) Setting P5SEL.0 causes the general-purpose I/O to be disabled in crystal mode. When using bypass mode, P5.1 can be used as general-purpose I/O. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 102 PIN NAME (P5.x) FUNCTION P5DIR.x P5SEL.x LCDS23 P5.4/S23 4 P5.4 (I/O) I: 0; O: 1 DVSS (1) X = don't care Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 103 (1) X = don't care (2) Setting P5SEL.x bit disables the output driver as well as the input Schmitt trigger. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 104 PJDIR.x DVSS PJOUT.x From JTAG PJ.1/TDI/TCLK PJDS.x PJ.2/TMS From JTAG 0: Low drive PJ.3/TCK 1: High drive PJIN.x To JTAG Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 105 (3) The pin direction is controlled by the JTAG module. (4) In JTAG mode, pullups are activated automatically on TMS, TCK, and TDI/TCLK. PJREN.x are do not care. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 106 Temp. Sensor 85°C REF Calibration 01A26h Calibration REF Calibration 01A27h length Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 107 Peripheral Peripheral Descriptor Tag 01A2Eh Descriptor (PD) Peripheral Descriptor 01A2Fh Length Peripheral Descriptors 01A30h PD Length Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 108 Recommended Operating Conditions, Added note about C tolerance. VCORE Peripheral File Map, Removed CRCRESR and CRCDIRB registers (do not apply). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: CC430F6137 CC430F6135 CC430F6127 CC430F6126 CC430F6125 CC430F5137 CC430F5135 CC430F5133...
  • Page 109 CC430F6135 & no Sb/Br) CC430F6137IRGCR ACTIVE VQFN 2000 Green (RoHS CU NIPDAU | Call TI Level-3-260C-168 HR -40 to 85 CC430F6137 & no Sb/Br) CC430F6137IRGCT ACTIVE VQFN Green (RoHS CU NIPDAU Level-3-260C-168 HR -40 to 85 CC430F6137 & no Sb/Br)
  • Page 110 PACKAGE OPTION ADDENDUM www.ti.com 9-Sep-2017 The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
  • Page 111 PACKAGE MATERIALS INFORMATION www.ti.com 1-Jun-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) CC430F6125IRGCR VQFN 2000 330.0 16.4 12.0 16.0 CC430F6126IRGCR VQFN 2000...
  • Page 112 PACKAGE MATERIALS INFORMATION www.ti.com 1-Jun-2017 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) CC430F6125IRGCR VQFN 2000 336.6 336.6 28.6 CC430F6126IRGCR VQFN 2000 336.6 336.6 28.6 CC430F6126IRGCT VQFN 213.0 191.0 55.0 CC430F6127IRGCR VQFN 2000 336.6 336.6...
  • Page 119 IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.