Advertisement
Philips Semiconductors
12-bit high-speed Analog-to-Digital
Converter (ADC)
handbook, full pagewidth
220 nF
IN
50
50
R1
V CCA
(2)
R2
The analog, digital and output supplies should be separated and decoupled.
(1) At power-up a high level clock must be provided within less than 1 s or a pull-up resistor must be connected between CLK and V
(2) R1, and R2 must be determined in order to obtain a voltage of 2.5 V on V
minimum current into these resistors must be about 1 mA.
(3) V
must be decoupled to V
ref
1999 Feb 16
V I
V I
50
n.c.
5 V
4.7
10
100 nF
F
nF
n.c.
n.c.
n.c.
n.c.
100 nF
5 V
(3)
100 nF
V ref
MBH146
.
CCA
Fig.7 Application diagram (single input mode).
5 V
SH
5 V
mode
100 nF
44 43 42 41 40 39 38 37 36 35 34
1
2
3
4
5
TDA8767H
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22
n.c.
n.c.
n.c.
n.c.
5 V
100 nF
and V
; see Table 1. To ensure a sufficient analog input stability, the
I
I
14
Preliminary specification
100 nF
(1)
CLK
n.c.
5 V
100 nF
33
32
D0 (LSB)
31
D1
30
D2
29
D3
28
D4
27
D5
26
D6
25
D7
24
D8
D9
23
IR
D10
D11
(MSB)
chip select input OE
output format select TC
TDA8767
.
CCD
Advertisement
