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IC BLOCK DIAGRAM & DESCRIPTION
U0201 LA6541 D
Vcc
Vref
VIN4
VG4
V08
V07
GND
V06
V05
VG3
VIN3
CD
RES
Level
BTL
BTL
Level
Sift
Driver
Driver
Sift
Regulator
Ilkfl
I
I
Vcc
Mute
VIN1
VG 1
Vol
V02
GND
V03
V04
VG2
VIN2 Reg OUT Reg IN
U0301 LC78622E
TST11 TEST2 TEST4
EFMO
VVDD VVSS
PDO ISET FR
PCK
TAI
TEST1 TEST3 TEST5
VDD VSS
=+=zm==+
I
'AM
r-----
'enerator -
2K
-8bit
RAM Address
i
Syncrnous Detect
EFM Demodulation
Interpolalation Mute
1'
I
General Ports
HFLTES TOFF JP- JP+ RES TGL CONT1 CONT3 CONT5 Ek
CONT2 CONT4
L_.
Cl
C2 Error Detect&
I'-l==%
Correct Control Flag
A
8
Digital Attenuator
Quadruple Over Sampling
Digital Filter
X'tal Root
Timing Generator
H EFLG16M 4.2M
FSX XIN
XVDD
RVDD
Xvss
XOUT
RVSS
MUTER
$
1bit DAC
L.P.F
RCHO LCHO MUTEL
LVDD
LVSS
C2F
DOUT
(NC)
-17-
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