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IC BLOCK DIAGRAM & DESCRIPTION
. .
U0301 LC78622E
(Diaital Sianal Processor)
No.
Name
llo
Function
1
DEFI
I
Input of defect detection signal. (Connect to OV)
2
TAU
I
For PLL, Input for test, (Surely connect to OV)
3
Pm
o
For PLL. Output of phase comparator
3
for external VCO.
4
Vvss
-
For PLL. Ground for internal VCO.
5
ISET
Al For PLL. Connection of resistor for current
adjustment of PDO output.
6
VVDD
-
For PLL. Power supply for internal VCO.
7
FR
Al For PLL. For adjustment of VCO frequency range.
8
Vss
-
Ground for digital root. (Surely connect to OV)
9
EFMO
o
Output of EFM signal for slice level control,
10
EFMIN
I
Input of EFM signal for slice level control,
11
TEST2
I
Input for test. (Surely connect to OV)
12
CLV+
o
Output for disc motor control.
13
CLV-
0
Output for disc motor control.
14
v IF
o
Monitor output for automatic selection of rough servo
/phase control. H : rough servo, "~: phase control
15
HFL
I
Input of track detection signal.
16
TES
I
Input of tracking error signal.
17
TOFF
o
Output of tracking OFF signal.
18
TGL
o
Output ofselecfion fortrackinggain.
wb :gainup
19
.1P+
r--l C)Ih )t
of track in Imn control
a)
JP-
0
Output of track jump control.
21
PCK
o
Output of clock monitor for playback EFM data,
When rocked tie phase: 4.321 8MHz
Z?
FSEQ
o
Output of detection for synchronizing signal.
When accordant to detected synchronizing signal
from EFM signal and synchronizing signal in internal
~
24
CONT1
l/O input/Outputforgenerel.
%
CONT2
1/0 Control by serial date command from
I 28 ICONT5 I I/ol
I
I 29 I EMPH I O 10utput of monitor for de-emphasis.
I
Playback during diemphasis disc : "H" level
3)
C2F
o
Output of C2 flag.
31
DOUT
o
Output of Digital OUT, (EIAJ foamed)
3?
TEST3
I
Input for test. (Surely conned to OV)
33
TEST4
I
Input for test. (Surely connect to OV)
34
NC
-
Not connection. (Open)
U0401 LC6543F (Micro-Processor)
INo. I Name IVQI
Deacriotion
I
1 I DRF
I l/O IRF signal detect
2
VDD
! - IGND
face for LC7822
I
3 I SQOUTI 1/0 I Inter
I 4 I COIN 11/0 Ilnter face for LC7822
or LC7822
5
CQCK
1/0
Interface fc
6
WRQ
1/0 Interface for LC7822
7
RWC
1/0 Interface for LC7822
I
8 A-MUTE
1/0
Audio mute control
9
FEED+
1/0 Sled motor control
10
FEED-
1/0
Sled
motor control
11
PIJIN
1/0 P~J-lN switch
H===l
35
MUTEL
O L-channel 1-bit DAC. Out ut of mutin
for L-channel.
L-channel 1-bit DAC. Power su
I for L-channel.
37
LCHO
O L-channel 1-bit DAC. Ou
ut si nal for L-channel.
-
L-channel 1-bit DAC. Ground terminal for L-channel.
(Surely connect to OV)
33
RVSS
-
R-channel 1-bit DAC. Ground terminal for R-channel.
(Surely connect to OV)
40
RCHO
o
R-channel 1-bit DAC. Outaut sianal for R-channel.
41
RVDD
-
R-channel 1-bit DAC. Power supply for R-channel.
42 MUTER
o
R-channel 1-bit DAC. Output of muting for R-channel.
43
XVDD
-
Power supply terminal for crystal oscillation.
44
XOUT
o
Connection terminal for crystal oscillation.
45
XIN
I
(16.9345MHz)
46
Xvss
o
Ground terminal for crystal oscillation.
(Surely connect to OV)
47
SBSY
o
Output of Synchronizing signal for sub-cede block.
48
EFLG
o
Terminal of correction monitor for Cl, C2, single
49]
Pw
] O [Output for P, Q, R, S, T, U and W of sub-code.
50 I SFSY I O 10utpuf of Synchronizing signal for sub-code flame.
I
I
lwhen the stand-by the sub-code, leading edge.
51 I SBCK ] I I Input terminal of reading clock for sub-cde.
I
I 52 I
FSX
I O 10utput terminal of synchronizing signal divided from
I
crystal oscillation (7.35 kHz).
53
WRQ
o
Output of stand-by signal for output the sub-code Q.
54
RWC
I
Input terminal of control signal for readkite.
5s
SQOUT
o
Output terminal for sub-code Q.
56
COIN
I
Input terminal for command from micro-processor.
57
m
I
Input of loading clock for command, or fetching clock
for sub-code from SQOUT.
%
m
I
Input terminal
of system reset.
When ON the power
supply, ones the "L".
w
TST11
o
Output terminal for test.
Use the Open status(Normal the output is "L").
I
I
I (When the un-control, connect to OV)
64 I TEST1 I I I Input for test. (Surely connect to OV)
No.
Name
Vo
Description
16
Oscl
I
Clock
input
17
TEST
I
Vss
18
Vss
-
GND
19
RESET
I
Reset
m
SEG-A
1/0 Light up Signal for LED (Segment a)
21
SEG-B
I/o
Light up Signal for LED (Segment b)
22
SEG-C
1/0
Light up Signal for LED (Segment c)
23
SEG-D
1/0 Light up Signal for LED (Segment d)
24
SEG-E
1/0 Light up Signal for LED (Segment e)
25
SEG-F
1/0 Light up Signal for LED (Segment f)
-.
m switch
Mute control
I 3) I PROG I l/O lProgram LED
I
-18-
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