Epson PX-8 User Manual page 107

The pin assignments of the system bus connector are as follows:
Signal name
AB15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BB 7
6
5
4
3
2
1
0
50 pin flat cable connector
2 •••••••••••••••••••••••••
as
1 • • • • • • • • • • • • • • • • • • • • • • • • • e4
(Viewed from rear)
Pin No.
I/O
Remarks
7
3
4
1
2 0 Z-80 address bus (no buffer)
13
16
15
14
11
12
9
10 110
Z-80 address bus (no buffer)
6
5
8
24
23
22
21
I/O Z-80 Data bus (no buffer)
20
19
18
17
4-40
Signal level
TTL
TTL
TTL
~
~'r: -
r~
-'
""7'
r~
..",
r~
-
r~
'fOI'
,-
' f 1IJI'
r~
-
r~
..g
-
~
~
I
'~
IIA'
I
'~
-
I:>
~
-
1
~
I~
-
~
l;;
..,
~
.~
...
t~
--
~' L~
-
~
l;,
~
W"
L
~~
l~
-
/ Ifb.
{~
-
L,~
".
~
L~
....
'
L~
... L!)
~
L,"~
-
L~
-
L~
.,
~~
.,
~
.,
L
Signal name PinNo. I/O Remarks Signal level
WAIT 28 I Z-80 wait signal TTL
BURQ 25 I
Z-80 bus request
TTL
BUAK 26 0
Z-80 bus acknowledge
TTL
MRQ 36 0 Z-80 memory request TTL
RD 35 0 Z-80 data read TTL
WR 37 0 Z-80 data write TTL
10RQ 40 0 Z-80 I/O request TTL
MI
27 0 Z-80 Ml (machine cycle 1) signal TTL
CLK 38 0 Z-80 main clock, 2.45 MHz
(1
buffer stage) TTL
RS 33 0 System reset signal (backup) TTL
INTEX 43 I External interrupt signal TTL
SPI
34 I External speaker input (D-MDM)
o
to 5V
BK2 48 I Bank 2 switching signal BK2
=
0:BANK2 TTL
DW 42 0 RF control signal for expansion DRAM TTL
DCAS 41 0 RF control signal for expansion DRAM TTL
OFF 44 0
Logic power supply (
+
5V) ON signal;
TTL
logic power turned on when PON
=
0
TXD
46
0 82C51 TXD output signal TTL
RXD 45
I RXD signal to 82C51 from external option TTL
VBl 47 PIS
Battery power supply; not affected by SW
4 to 6V
on board
---
Battery power supply; turned on/off by
HLTA 30 0
SW on board
TTL
VCH 39 PIS
Power supply for battery charging (AC
6 to 8V
adapter output)
VL 29 PIS
Logic power supply 4.5 to 6V
OND 31,32 Signal ground
CO
49,50 Chassis ground
NOTE:
The direction of signal
is
viewed from the PX-8
4-41