2. SDRAM CLOCK
DCLK=128MHz, Vp-p=1.77, Vmax=2.35V
7
FIG 2-1
3. TRAY OPEN/CLOSE SIGNAL
8
FIG 3-1
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
DBA0
DBA1
SDCKE
SDCLK
7
8
OPEN
CLOSE
3-13
R205
R205
33
33
R206
R206
33
33
R207
R207
33
33
R208
R208
151
151
TROPEN
Tray_Open_SW
4
1
SW301
SW301
3
2
SW PUSHBUTTON
SW PUSHBUTTON
C322
C322
104
104
LGE Internal Use Only
BA0
BA1
DCKE
DCLK
S3.3V
R332
R332
10K
10K
C321
C321
104
104