Details And Waveforms On System Test And Debugging; System 27Mhz Clock, Reset, Flash Sck Signal - LG DP372D Service Manual

DETAILS AND WAVEFORMS ON SYSTEM TEST AND DEBUGGING

1. SYSTEM 27MHz CLOCK, RESET, FLASH SCK SIGNAL.

1-1. 1389P main clock is at 27MHz(Y201)
1
FIG 1-1
1-2. 1389P reset is active high.
2
3
FIG 1-2
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Only for training and service purposes
XO
C169 C169
33pF 33pF
1
3.3V
/M_RESET
+ CE112 + CE112
NC/47uF/10V NC/47uF/10V
U102 U102
CM1117SCM233 CM1117SCM233
3.3V SOT223 SOT223
3
IN
+ CE111 + CE111
100uF/6.3V 100uF/6.3V
3-11
R120 R120 100K 100K
X101 X101 27MHz 27MHz
XI
1 2
3
C170 C170
33pF 33pF
Crystal
R332 R332
TROPEN
Tray_Open_SW
10K 10K
C321 C321
4 1
104 104
SW301 SW301
RESET
3 2
SW PUSHBUTTON SW PUSHBUTTON
3
1.8V
C322 C322
104 104
2
L115 L115 1.8V
50 PB 50 PB
4
TAB
2
OUT
R121 R121 C171 C171 + CE110 + CE110
680 680
104 104 100uF/6.3V 100uF/6.3V
1
R123 R123 330 330
CM1117SCM223
LGE Internal Use Only
4
3
2